pmap tlb shootdowns
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@@ -3,6 +3,7 @@
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#include <zinnia/irq.h>
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#include <zinnia/panic.h>
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#include <zinnia/percpu.h>
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#include <zinnia/pmap.h>
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#include <zinnia/print.h>
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#include <zinnia/sched.h>
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#include <zinnia/usercopy.h>
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@@ -93,6 +94,10 @@ void interrupt_handler(struct arch_context* ctx) {
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if (arch_sched_preempt_enable())
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sched_reschedule(&cpu->sched);
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break;
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case IDT_IPI_SHOOTDOWN:
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lapic_eoi(&arch_cpu->lapic);
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pmap_shootdown_handle();
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break;
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default:
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if (isr < 0x20)
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panic("Unhandled exception %lu at %#lx, error: %#lx\n", isr, ctx->rip, ctx->error);
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@@ -1,5 +1,10 @@
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#include <zinnia/irq.h>
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#include <zinnia/percpu.h>
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#include <zinnia/pmap.h>
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#include <zinnia/types.h>
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#include <x86_64/apic.h>
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#include <x86_64/defs.h>
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#include <x86_64/percpu.h>
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#include <x86_64/pmap.h>
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void pte_clear(pte_t* pte) {
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@@ -10,6 +15,26 @@ void pte_flush(uintptr_t vaddr) {
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asm volatile("invlpg [%0]" ::"r"(vaddr) : "memory");
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}
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void pte_flush_all() {
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uint64_t cr3;
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asm volatile("mov %0, cr3" : "=r"(cr3));
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asm volatile("mov cr3, %0" ::"r"(cr3) : "memory");
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}
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void pte_shootdown_kick(struct percpu* cpu) {
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irq_lock();
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lapic_send_ipi(
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&percpu_ref(arch_data)->lapic,
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percpu_ref_on(cpu, arch_data)->lapic.id,
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IDT_IPI_SHOOTDOWN,
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APIC_DELIVERY_FIXED,
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APIC_DEST_PHYSICAL,
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APIC_LEVEL_ASSERT,
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APIC_TRIGGER_EDGE
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);
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irq_unlock();
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}
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pte_t pte_build(phys_t addr, enum pte_flags flags, enum cache_mode cache) {
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pte_t result = ((pte_t)addr & ARCH_PTE_ADDR_MASK) | ARCH_FLAG_PRESENT;
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@@ -162,6 +162,7 @@ void arch_task_fini(struct arch_task_context* context) {
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const uintptr_t fpu_base = (uintptr_t)context->fpu_region;
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for (size_t i = 0; i < fpu_size; i += page_size)
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pmap_unmap(&kernel_vma.pmap, fpu_base + i);
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pmap_shootdown(&kernel_vma.pmap);
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mem_phys_free(context->fpu_phys, ALIGN_UP(fpu_size, page_size) / page_size);
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vm_free(fpu_base, fpu_size);
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