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This commit is contained in:
Marvin
2026-09-16 04:37:37 +02:00
parent e71245c082
commit 3e9bdf72c9
74 changed files with 555 additions and 567 deletions
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arch/x86_64/hpet.c
+1 -1
View File
@@ -58,7 +58,7 @@ void hpet_init() {
struct acpi_hpet* hpet = table.ptr;
hpet_clock.regs = mmio_new(hpet->address.address, 0x1000);
uacpi_table_unref(&table);
printf("HPET regs at %p\n", hpet_clock.regs.base);
kprintf("HPET regs at %p\n", hpet_clock.regs.base);
mmio_store(&hpet_clock.regs, HPET_CFG, mmio_load(&hpet_clock.regs, HPET_CFG) | 1);
arch/x86_64/meson.build
+1
View File
@@ -2,6 +2,7 @@ kernel_c_args += [
'-mgeneral-regs-only',
'-mno-red-zone',
'-mcmodel=kernel',
'-masm=intel',
]
kernel_sources += files(
arch/x86_64/syscall.c
+2
View File
@@ -5,6 +5,8 @@
#include <stddef.h>
#include <x86_64/defs.h>
// TODO: Refactor to only push callee-saved registers.
[[__naked]]
void arch_syscall_stub() {
asm volatile(
arch/x86_64/tsc.c
+5 -5
View File
@@ -11,7 +11,7 @@ void tsc_init() {
return;
if (!(asm_cpuid(1, 0).edx & CPUID_1D_TSC) || !(asm_cpuid(0x8000'0007, 0).edx & (1 << 8))) {
printf("No invariant TSC detected!\n");
kprintf("No invariant TSC detected!\n");
return;
}
@@ -34,18 +34,18 @@ void tsc_init() {
// On a normal system, this should usually never be called and is a last resort
// since at this point we have at least the HPET timer.
if (tsc_leaf.ecx != 0 && tsc_leaf.ebx != 0 && tsc_leaf.eax != 0) {
printf("Calibrating TSC using CPUID 0x15");
kprintf("Calibrating TSC using CPUID 0x15");
freq = tsc_leaf.ecx * tsc_leaf.ebx / tsc_leaf.eax;
} else {
printf("Unable to calibrate TSC using CPUID frequency information");
kprintf("Unable to calibrate TSC using CPUID frequency information");
return;
}
} else {
printf("Unable to calibrate the TSC without a clock or static frequency info!\n");
kprintf("Unable to calibrate the TSC without a clock or static frequency info!\n");
return;
}
printf("Timer frequency is %lu MHz\n", freq / 1'000'000);
kprintf("Timer frequency is %lu MHz\n", freq / 1'000'000);
}
static void tsc_option(bool opt) {
arch/x86_64/usercopy.c
+9 -9
View File
@@ -17,7 +17,7 @@ bool arch_usercopy_read(void* dst, const __user void* src, size_t len, struct us
// Setup regs for `rep movsb`.
"xchg rcx, rdx\n"
"mov rax, [rip + %0]\n"
"mov [rdx], rax\n"
"xchg [rdx], rax\n"
".global x86_64_read_start\n"
"x86_64_read_start:\n"
@@ -26,7 +26,7 @@ bool arch_usercopy_read(void* dst, const __user void* src, size_t len, struct us
".global x86_64_read_end\n"
"x86_64_read_end:\n"
"xor rax, rax\n"
"mov [rdx], rax\n"
"xchg [rdx], rax\n"
"mov rax, 1\n"
"clac\n"
"ret\n"
@@ -34,7 +34,7 @@ bool arch_usercopy_read(void* dst, const __user void* src, size_t len, struct us
".global x86_64_read_fault\n"
"x86_64_read_fault:\n"
"xor rax, rax\n"
"mov [rdx], rax\n"
"xchg [rdx], rax\n"
"clac\n"
"ret\n"
:
@@ -69,7 +69,7 @@ bool arch_usercopy_write(__user void* dst, const void* src, size_t len, struct u
".global x86_64_write_end\n"
"x86_64_write_end:\n"
"xor rax, rax\n"
"mov [rdx], rax\n"
"xchg [rdx], rax\n"
"mov rax, 1\n"
"clac\n"
"ret\n"
@@ -77,11 +77,11 @@ bool arch_usercopy_write(__user void* dst, const void* src, size_t len, struct u
".global x86_64_write_fault\n"
"x86_64_write_fault:\n"
"xor rax, rax\n"
"mov [rdx], rax\n"
"xchg [rdx], rax\n"
"clac\n"
"ret\n"
:
: "i"(&read_region)
: "i"(&write_region)
: "memory"
);
return false;
@@ -102,7 +102,7 @@ bool arch_usercopy_strlen(const __user char* str, size_t max, size_t* len, struc
asm volatile(
"stac\n"
"mov rax, [rip + %0]\n"
"mov [rcx], rax\n"
"xchg [rcx], rax\n"
".global x86_64_strlen_start\n"
"x86_64_strlen_start:\n"
@@ -119,7 +119,7 @@ bool arch_usercopy_strlen(const __user char* str, size_t max, size_t* len, struc
".global x86_64_strlen_end\n"
"x86_64_strlen_end:\n"
"xor rax, rax\n"
"mov [rcx], rax\n"
"xchg [rcx], rax\n"
"mov rax, 1\n"
"clac\n"
"ret\n"
@@ -127,7 +127,7 @@ bool arch_usercopy_strlen(const __user char* str, size_t max, size_t* len, struc
".global x86_64_strlen_fault\n"
"x86_64_strlen_fault:\n"
"xor rax, rax\n"
"mov [rcx], rax\n"
"xchg [rcx], rax\n"
"clac\n"
"ret\n"
: