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This commit is contained in:
Marvin
2026-09-20 05:27:41 +02:00
parent 831308b2ad
commit 77f228df11
38 changed files with 465 additions and 115 deletions
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arch/x86_64/Kconfig
+16
View File
@@ -0,0 +1,16 @@
menu "x86_64 Architecture options"
config X86_64
bool
default y
select ACPI
select HAVE_MMU
select HAVE_MMU_GENERIC
help
64-bit x86 CPU support for AMD and Intel CPUs.
config TSC
bool "Invariant Timestamp Counter support"
default y
endmenu
arch/x86_64/meson.build
-1
View File
@@ -1,7 +1,6 @@
kernel_c_args += [
'-mgeneral-regs-only',
'-mno-red-zone',
'-mcmodel=kernel',
'-masm=intel',
]
arch/x86_64/percpu.c
+3
View File
@@ -1,5 +1,6 @@
#include <zinnia/percpu.h>
#include <zinnia/print.h>
#include <config.h>
#include <stddef.h>
#include <x86_64/apic.h>
#include <x86_64/asm.h>
@@ -119,7 +120,9 @@ static void setup_cpu(struct percpu* cpu) {
void arch_percpu_init() {
hpet_init();
#if CONFIG_TSC
tsc_init();
#endif
// Init the BSP.
setup_cpu(&percpu_bsp);
arch/x86_64/sched.c
+3 -3
View File
@@ -94,9 +94,9 @@ void task_entry_thunk() {
asm volatile(
"mov rdi, rbx\n"
"mov rsi, r12\n"
"jmp %c0"
"jmp %0"
:
: "i"(task_entry)
: "r"(task_entry)
: "memory"
);
}
@@ -173,7 +173,7 @@ bool arch_sched_preempt_enable() {
void arch_sched_jump_to_context(struct arch_context* context) {
asm volatile(
"mov rsp, rdi\n"
"jmp %c0\n" ::"i"(interrupt_return)
"jmp %0\n" ::"r"(interrupt_return)
);
}
arch/x86_64/sys.c
+2 -2
View File
@@ -11,9 +11,9 @@
[[__init, __naked, __used]]
void _start() {
asm volatile(
"lea rsp, [rip + %0]\n"
"mov rsp, %0\n"
"jmp %1"
:
: "i"(__ld_stack_top), "r"(kernel_entry)
: "r"(__ld_stack_top), "r"(kernel_entry)
);
}
arch/x86_64/syscall.c
+2 -2
View File
@@ -39,7 +39,7 @@ void arch_syscall_stub() {
" push r15\n"
" xor rbp, rbp\n"
" mov rdi, rsp\n" // SysV ABI first argument.
" call %c4\n" // Call syscall handler.
" call %4\n" // Call syscall handler.
" cli\n"
" pop r15\n"
" pop r14\n"
@@ -66,6 +66,6 @@ void arch_syscall_stub() {
"i"(offsetof(struct percpu, kernel_stack)), // 1
"i"(offsetof(struct gdt, user_code64) | CPL_USER), // 2
"i"(offsetof(struct gdt, user_data) | CPL_USER), // 3
"i"(syscall_dispatch) // 4
"r"(syscall_dispatch) // 4
);
}
arch/x86_64/usercopy.c
+52 -53
View File
@@ -1,6 +1,14 @@
#include <zinnia/compiler.h>
#include <arch/usercopy.h>
void arch_usercopy_allow(bool state) {
if (state) {
asm volatile("stac" ::: "memory");
} else {
asm volatile("clac" ::: "memory");
}
}
extern void x86_64_read_start();
extern void x86_64_read_end();
extern void x86_64_read_fault();
@@ -11,37 +19,34 @@ static const struct usercopy_region read_region = {
.fault_ip = x86_64_read_fault,
};
[[__naked]]
bool arch_usercopy_read(void* dst, const __user void* src, size_t len, struct usercopy_region** region) {
asm volatile(
"stac\n"
// Setup regs for `rep movsb`.
"xchg rcx, rdx\n"
"mov rax, [rip + %0]\n"
"xchg [rdx], rax\n"
" xchg rcx, rdx\n"
" mov rax, [rip + %0]\n"
" xchg [rdx], rax\n"
".global x86_64_read_start\n"
"x86_64_read_start:\n"
"rep movsb\n"
" x86_64_read_start:\n"
" rep movsb\n"
".global x86_64_read_end\n"
"x86_64_read_end:\n"
"xor rax, rax\n"
"xchg [rdx], rax\n"
"mov rax, 1\n"
"clac\n"
"ret\n"
" xor rax, rax\n"
" xchg [rdx], rax\n"
" mov rax, 1\n"
" ret\n"
".global x86_64_read_fault\n"
"x86_64_read_fault:\n"
"xor rax, rax\n"
"xchg [rdx], rax\n"
"clac\n"
"ret\n"
" xor rax, rax\n"
" xchg [rdx], rax\n"
" ret\n"
:
: "i"(&read_region)
: "memory"
);
return false;
}
extern void x86_64_write_start();
@@ -54,37 +59,34 @@ static const struct usercopy_region write_region = {
.fault_ip = x86_64_write_fault,
};
[[__naked]]
bool arch_usercopy_write(__user void* dst, const void* src, size_t len, struct usercopy_region** region) {
asm volatile(
"stac\n"
// Setup regs for `rep movsb`.
"xchg rcx, rdx\n"
"mov rax, [rip + %0]\n"
"mov [rdx], rax\n"
" xchg rcx, rdx\n"
" mov rax, [rip + %0]\n"
" mov [rdx], rax\n"
".global x86_64_write_start\n"
"x86_64_write_start:\n"
"rep movsb\n"
" x86_64_write_start:\n"
" rep movsb\n"
".global x86_64_write_end\n"
"x86_64_write_end:\n"
"xor rax, rax\n"
"xchg [rdx], rax\n"
"mov rax, 1\n"
"clac\n"
"ret\n"
" x86_64_write_end:\n"
" xor rax, rax\n"
" xchg [rdx], rax\n"
" mov rax, 1\n"
" ret\n"
".global x86_64_write_fault\n"
"x86_64_write_fault:\n"
"xor rax, rax\n"
"xchg [rdx], rax\n"
"clac\n"
"ret\n"
" xor rax, rax\n"
" xchg [rdx], rax\n"
" ret\n"
:
: "i"(&write_region)
: "memory"
);
return false;
}
extern void x86_64_strlen_start();
@@ -100,36 +102,33 @@ static const struct usercopy_region strlen_region = {
[[__naked]]
bool arch_usercopy_strlen(const __user char* str, size_t max, size_t* len, struct usercopy_region** region) {
asm volatile(
"stac\n"
"mov rax, [rip + %0]\n"
"xchg [rcx], rax\n"
" mov rax, [rip + %0]\n"
" xchg [rcx], rax\n"
".global x86_64_strlen_start\n"
"x86_64_strlen_start:\n"
"xor r8, r8\n"
" x86_64_strlen_start:\n"
" xor r8, r8\n"
".Lloop:\n"
"cmp byte ptr [rdi + r8], 0\n"
"je .Lleave\n"
"inc r8\n"
"cmp rsi, r8\n"
"jne .Lloop\n"
" cmp byte ptr [rdi + r8], 0\n"
" je .Lleave\n"
" inc r8\n"
" cmp rsi, r8\n"
" jne .Lloop\n"
".Lleave:\n"
"mov [rdx], r8\n"
" mov [rdx], r8\n"
".global x86_64_strlen_end\n"
"x86_64_strlen_end:\n"
"xor rax, rax\n"
"xchg [rcx], rax\n"
"mov rax, 1\n"
"clac\n"
"ret\n"
" xor rax, rax\n"
" xchg [rcx], rax\n"
" mov rax, 1\n"
" ret\n"
".global x86_64_strlen_fault\n"
"x86_64_strlen_fault:\n"
"xor rax, rax\n"
"xchg [rcx], rax\n"
"clac\n"
"ret\n"
" xor rax, rax\n"
" xchg [rcx], rax\n"
" ret\n"
:
: "i"(&strlen_region)
: "memory"