port apic and hpet to mmio API, apic_msis
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+12
-8
@@ -26,18 +26,20 @@ struct hpet {
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uint32_t period;
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};
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constexpr uint32_t HPET_CAP = 0x0;
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constexpr uint32_t HPET_CFG = 0x10;
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constexpr uint32_t HPET_COUNTER = 0xF0;
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constexpr mmio_reg64 HPET_REG_CAP = {.offset = 0x0};
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constexpr mmio_field64 HPET_CAP_PERIOD = {HPET_REG_CAP, 32, 32};
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constexpr mmio_reg64 HPET_REG_CFG = {.offset = 0x10};
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constexpr mmio_field64 HPET_CFG_ENABLE = {HPET_REG_CFG, 0, 1};
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constexpr mmio_reg64 HPET_REG_COUNTER = {.offset = 0xF0};
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static void hpet_reset(struct clock* c) {
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struct hpet* hpet = containerof(c, struct hpet, clock);
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mmio_write64(hpet->regs + HPET_COUNTER, 0);
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mmio_reg_write(hpet->regs, HPET_REG_COUNTER, 0);
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}
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static uint64_t hpet_get_elapsed_ns(struct clock* c) {
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struct hpet* hpet = containerof(c, struct hpet, clock);
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uint64_t counter = mmio_read64(hpet->regs + HPET_COUNTER);
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uint64_t counter = mmio_reg_read(hpet->regs, HPET_REG_COUNTER);
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return (uint64_t)((__uint128_t)counter * (__uint128_t)hpet->period / 1'000'000);
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}
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@@ -69,10 +71,12 @@ static void hpet_init(struct boot_info*) {
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uacpi_table_unref(&table);
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log("x86_64/hpet: HPET registers mapped at %p\n", hpet_clock.regs);
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mmio_write64(hpet_clock.regs + HPET_CFG, mmio_read64(hpet_clock.regs + HPET_CFG) | 1);
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uint64_t cfg = mmio_reg_read(hpet_clock.regs, HPET_REG_CFG);
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cfg |= mmio_field(HPET_CFG_ENABLE, 1);
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mmio_reg_write(hpet_clock.regs, HPET_REG_CFG, cfg);
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uint64_t caps = mmio_read64(hpet_clock.regs + HPET_CAP);
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hpet_clock.period = (caps >> 32) & 0xFFFF'FFFF;
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uint64_t cap = mmio_reg_read(hpet_clock.regs, HPET_REG_CAP);
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hpet_clock.period = mmio_field_get(HPET_CAP_PERIOD, cap);
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assert(clock_switch(&hpet_clock.clock), "Unable to switch to HPET!");
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}
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