test

arch/x86_64/include/bits/elf.h

@@ -0,0 +1,32 @@
+#pragma once
+
+#include <zinnia/elf.h>
+
+#define ELF_ARCH_CLASS   ELFCLASS64
+#define ELF_ARCH_DATA    ELFDATA2LSB
+#define ELF_ARCH_MACHINE EM_X86_64
+
+#define ELF_R_SYM   ELF64_R_SYM
+#define ELF_R_TYPE  ELF64_R_TYPE
+#define ELF_ST_BIND ELF64_ST_BIND
+#define ELF_ST_TYPE ELF64_ST_TYPE
+
+#define elf_ehdr elf64_ehdr
+#define elf_phdr elf64_phdr
+#define elf_dyn  elf64_dyn
+#define elf_addr elf64_addr
+#define elf_off  elf64_off
+#define elf_nhdr elf64_nhdr
+#define elf_auxv elf64_auxv
+#define elf_sym  elf64_sym
+#define elf_rela elf64_rela
+#define elf_rel  elf64_rel
+
+enum {
+    R_NONE = 0,
+    R_COPY = 5,
+    R_GLOB_DAT = 6,
+    R_JUMP_SLOT = 7,
+    R_RELATIVE = 8,
+    R_IRELATIVE = 37,
+};

arch/x86_64/include/bits/irq.h

@@ -0,0 +1,21 @@
+#pragma once
+
+#include <stdint.h>
+#include <x86_64/defs.h>
+
+static inline bool arch_irq_get_state() {
+    uint64_t flags;
+    asm volatile("pushf; pop %0" : "=r"(flags)::"memory");
+    return flags & RFLAGS_IF;
+}
+
+static inline void arch_irq_set_state(bool state) {
+    if (state)
+        asm volatile("sti");
+    else
+        asm volatile("cli");
+}
+
+static inline void arch_irq_wait() {
+    asm volatile("hlt");
+}

arch/x86_64/include/bits/mem.h

@@ -0,0 +1,33 @@
+#pragma once
+
+#include <stddef.h>
+#include <stdint.h>
+#include <zinnia/types.h>
+
+static inline size_t arch_mem_page_size() {
+    return 1 << 12;
+}
+
+static inline size_t arch_mem_page_bits() {
+    return 12;
+}
+
+static inline size_t arch_mem_level_bits() {
+    return 9;
+}
+
+static inline size_t arch_mem_num_levels() {
+    return 4;
+}
+
+static inline uintptr_t arch_mem_hhdm_addr() {
+    return 0xFFFF'8000'0000'0000;
+}
+
+static inline uintptr_t arch_vm_pfndb_addr() {
+    return 0xFFFF'A000'0000'0000;
+}
+
+static inline uintptr_t arch_mem_mapping_addr() {
+    return 0xFFFF'C000'0000'0000;
+}

arch/x86_64/include/bits/mmu.h

@@ -0,0 +1,5 @@
+#pragma once
+
+#include <stdint.h>
+
+typedef uint64_t pte_t;

arch/x86_64/include/bits/percpu.h

@@ -0,0 +1,27 @@
+#pragma once
+
+#include <stddef.h>
+#include <x86_64/apic.h>
+#include <x86_64/gdt.h>
+#include <x86_64/tss.h>
+#include <zinnia/irq.h>
+
+static inline struct percpu* arch_percpu_get() {
+    struct percpu* result;
+    asm volatile("mov %0, gs:0" : "=r"(result)::"memory");
+    return result;
+}
+
+struct arch_percpu {
+    struct gdt gdt;
+    struct tss tss;
+    struct local_apic lapic;
+    struct irq_line* irq_lines[128];
+    size_t fpu_size;
+    void (*fpu_save)(void*);
+    void (*fpu_restore)(const void*);
+    bool can_smap;
+};
+
+void arch_percpu_bsp_init();
+void arch_percpu_init();

arch/x86_64/include/bits/sched.h

@@ -0,0 +1,48 @@
+#pragma once
+
+#include <bits/types.h>
+#include <stdint.h>
+
+struct arch_task_context {
+    uint64_t rsp;
+    uint8_t* fpu_region;
+    uint16_t ds, es, fs, gs;
+    uint64_t fs_base, gs_base;
+};
+
+struct arch_context {
+    uint64_t r15;
+    uint64_t r14;
+    uint64_t r13;
+    uint64_t r12;
+    uint64_t r11;
+    uint64_t r10;
+    uint64_t r9;
+    uint64_t r8;
+    uint64_t rsi;
+    uint64_t rdi;
+    uint64_t rbp;
+    uint64_t rdx;
+    uint64_t rcx;
+    uint64_t rbx;
+    uint64_t rax;
+    uint64_t isr;   // Pushed onto the stack by the interrupt handler stubs.
+    uint64_t error; // Pushed onto the stack by the CPU if the interrupt has an error code.
+    uint64_t rip;   // The rest is pushed onto the stack by the CPU during an interrupt.
+    uint64_t cs;
+    uint64_t rflags;
+    uint64_t rsp;
+    uint64_t ss;
+};
+
+#define ARCH_CTX_NUM  rax
+#define ARCH_CTX_A0   rdi
+#define ARCH_CTX_A1   rsi
+#define ARCH_CTX_A2   rdx
+#define ARCH_CTX_A3   r9
+#define ARCH_CTX_A4   r8
+#define ARCH_CTX_A5   r10
+#define ARCH_CTX_A6   r12
+#define ARCH_CTX_A7   r13
+#define ARCH_CTX_RET0 rax
+#define ARCH_CTX_RET1 rdx

arch/x86_64/include/bits/types.h

@@ -0,0 +1,6 @@
+#pragma once
+
+#include <stdint.h>
+
+typedef uint64_t phys_t;
+typedef uint64_t reg_t;