diff --git a/arch/x86_64/idt.c b/arch/x86_64/idt.c
index fcde35b..f02a440 100644
--- a/arch/x86_64/idt.c
+++ b/arch/x86_64/idt.c
@@ -240,6 +240,7 @@ static struct idt_entry idt[256] = {};
 
 void idt_init() {
     REPEAT_256(INTERRUPT_SETUP)
+    idt[IDT_BP].attrib |= CPL_USER << 5;
 }
 
 void idt_load() {
diff --git a/arch/x86_64/include/bits/sched.h b/arch/x86_64/include/bits/sched.h
index 1d4f571..85285ca 100644
--- a/arch/x86_64/include/bits/sched.h
+++ b/arch/x86_64/include/bits/sched.h
@@ -37,6 +37,7 @@ struct arch_context {
 };
 
 #define ARCH_CTX_NUM  rax
+#define ARCH_CTX_SP   rsp
 #define ARCH_CTX_A0   rdi
 #define ARCH_CTX_A1   rsi
 #define ARCH_CTX_A2   rdx
@@ -45,3 +46,8 @@ struct arch_context {
 #define ARCH_CTX_A5   r9
 #define ARCH_CTX_RET0 rax
 #define ARCH_CTX_RET1 rdx
+
+struct arch_syscall_restart {
+    uint64_t rax;
+    uint64_t rdx;
+};
diff --git a/arch/x86_64/include/x86_64/asm.h b/arch/x86_64/include/x86_64/asm.h
index f5085cf..d6a64d4 100644
--- a/arch/x86_64/include/x86_64/asm.h
+++ b/arch/x86_64/include/x86_64/asm.h
@@ -40,6 +40,12 @@ static inline void asm_wrxcr(uint32_t reg, uint64_t val) {
     asm volatile("xsetbv" ::"a"(eax), "d"(edx), "c"(reg) : "memory");
 }
 
+static inline uint64_t asm_rdxcr(uint32_t reg) {
+    uint32_t eax, edx;
+    asm volatile("xgetbv" : "=a"(eax), "=d"(edx) : "c"(reg));
+    return ((uint64_t)edx << 32) | eax;
+}
+
 // Saves the FPU state to a 512-byte region of memory using FXSAVE.
 // Pointer must be 16-byte aligned.
 static inline void asm_fxsave(void* mem) {
diff --git a/arch/x86_64/include/x86_64/defs.h b/arch/x86_64/include/x86_64/defs.h
index 9077a26..fd0364f 100644
--- a/arch/x86_64/include/x86_64/defs.h
+++ b/arch/x86_64/include/x86_64/defs.h
@@ -206,6 +206,20 @@
 #define CPL_USER   (0x3)
 #define CPL_KERNEL (0x0)
 
-#define IDT_PF          (0xE)
-#define IDT_SPURIOUS    (0xFE)
-#define IDT_IPI_RESCHED (0xFF)
+#define IDT_DE            (0x0)
+#define IDT_DB            (0x1)
+#define IDT_BP            (0x3)
+#define IDT_OF            (0x4)
+#define IDT_BR            (0x5)
+#define IDT_UD            (0x6)
+#define IDT_NM            (0x7)
+#define IDT_SS            (0xC)
+#define IDT_GP            (0xD)
+#define IDT_PF            (0xE)
+#define IDT_MF            (0x10)
+#define IDT_AC            (0x11)
+#define IDT_XM            (0x13)
+#define IDT_IPI_SHOOTDOWN (0xFC)
+#define IDT_TIMER         (0xFD)
+#define IDT_SPURIOUS      (0xFE)
+#define IDT_IPI_RESCHED   (0xFF)