lock irqs in spinlock

arch/x86_64/meson.build

@@ -18,7 +18,7 @@ kernel_sources += files(
     'sched.c',
     'serial.c',
     'smp.c',
-    'sys.c',
+    'start.c',
     'syscall.c',
     'tsc.c',
     'usercopy.c',

arch/x86_64/sched.c

@@ -208,14 +208,14 @@ void arch_sched_jump_to_user(uintptr_t ip, uintptr_t sp, uintptr_t arg) {
     };
 
     uintptr_t percpu = asm_rdmsr(MSR_GS_BASE);
-    const uint16_t zero = 0;
     asm volatile(
         "mov ds, %0\n"
         "mov es, %0\n"
         "mov fs, %0\n"
         "mov gs, %0\n"
         :
-        : "r"(zero)
+        : "a"(0)
+        : "memory"
     );
 
     asm_wrmsr(MSR_FS_BASE, 0);

core/spin.c

@@ -1,3 +1,4 @@
+#include <zinnia/irq.h>
 #include <zinnia/spin.h>
 #include <stdatomic.h>
 
@@ -7,6 +8,7 @@ void spin_init(struct spinlock* spin) {
 }
 
 void spin_lock(struct spinlock* spin) {
+    irq_lock();
     uint32_t my = atomic_fetch_add_explicit(&spin->next, 1, memory_order_relaxed);
 
     while (atomic_load_explicit(&spin->owner, memory_order_acquire) != my) {
@@ -17,4 +19,5 @@ void spin_lock(struct spinlock* spin) {
 void spin_unlock(struct spinlock* spin) {
     uint32_t val = atomic_load_explicit(&spin->owner, memory_order_relaxed);
     atomic_store_explicit(&spin->owner, val + 1, memory_order_release);
+    irq_unlock();
 }