60 lines
1.4 KiB
C
60 lines
1.4 KiB
C
#include <zinnia/pmap.h>
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#include <zinnia/types.h>
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#include <x86_64/pmap.h>
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void pte_clear(pte_t* pte) {
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*pte = 0;
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}
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void pte_flush(uintptr_t vaddr) {
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asm volatile("invlpg [%0]" ::"r"(vaddr) : "memory");
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}
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pte_t pte_build(phys_t addr, enum pte_flags flags, enum cache_mode cache) {
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pte_t result = ((pte_t)addr & ARCH_PTE_ADDR_MASK) | ARCH_FLAG_PRESENT;
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if (flags & PTE_USER)
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result |= ARCH_FLAG_USER_MODE;
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if (flags & PTE_DIR)
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result |= ARCH_FLAG_READ_WRITE;
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else {
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if (flags & PTE_WRITE)
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result |= ARCH_FLAG_READ_WRITE;
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if (!(flags & PTE_EXEC))
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result |= ARCH_FLAG_EXECUTE_DISABLE;
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switch (cache) {
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case CACHE_ANY:
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case CACHE_WRITE_BACK:
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break;
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case CACHE_WRITE_THROUGH:
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result |= ARCH_FLAG_WRITE_THROUGH;
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break;
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case CACHE_MMIO:
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result |= ARCH_FLAG_CACHE_DISABLE | ARCH_FLAG_WRITE_THROUGH;
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break;
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case CACHE_WRITE_COMBINE:
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result |= ARCH_FLAG_ATTRIBUTE_TABLE | ARCH_FLAG_WRITE_THROUGH;
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break;
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}
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}
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return result;
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}
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bool pte_is_present(pte_t* pte) {
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return *pte & ARCH_FLAG_PRESENT;
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}
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bool pte_is_dir(pte_t* pte) {
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return *pte & ARCH_FLAG_SIZE;
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}
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phys_t pte_address(pte_t* pte) {
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return (phys_t)(*pte & ARCH_PTE_ADDR_MASK);
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}
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void pmap_set(struct pmap* pt) {
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asm volatile("mov cr3, %0" ::"r"(pt->root) : "memory");
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}
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