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https://github.com/Mathewnd/Astral.git
synced 2026-10-30 05:58:22 +00:00
scheduler: continue rework
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@@ -168,13 +168,13 @@ void arch_apic_initap() {
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interrupt_register(0xff, spurious, NULL, IPL_IGNORE);
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writelapic(APIC_REG_SPURIOUS, 0x1FF);
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current_cpu()->id = readlapic(APIC_REG_ID) >> 24;
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current_cpu()->hardware_id = readlapic(APIC_REG_ID) >> 24;
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// get the acpi id for the local nmi sources
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for (size_t i = 0; i < lapic_count; ++i) {
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struct acpi_madt_lapic *current = getentry(ACPI_MADT_ENTRY_TYPE_LAPIC, i);
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if (current_cpu()->id == current->id) {
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if (current_cpu()->hardware_id == current->id) {
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current_cpu()->acpiid = current->uid;
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break;
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}
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@@ -233,7 +233,7 @@ void arch_apic_timerinit() {
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writelapic(APIC_TIMER_INITIAL_COUNT, 0);
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printf("cpu%lu: local apic timer calibrated at %lu ticks per us. ISR vector %lu\n", current_cpu()->id, ticksperus, vec);
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printf("cpu%lu: local apic timer calibrated at %lu ticks per us. ISR vector %lu\n", current_cpu()->internal_id, ticksperus, vec);
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writelapic(APIC_LVT_TIMER, vec);
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@@ -211,7 +211,7 @@ void arch_cpu_init() {
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char str_buf[128];
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size_t done = 0;
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done += snprintf(str_buf, 128, "cpu%d: %s@", current_cpu()->id, current_cpu()->vendor);
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done += snprintf(str_buf, 128, "cpu%d: %s@", current_cpu()->internal_id, current_cpu()->vendor);
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for (int i = 0; i < topology_depth; ++i)
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done += snprintf(str_buf + done, 128 - done, "%d%c", topology_ids[i], i == topology_depth - 1 ? 0 : ':');
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str_buf[done] = '\n';
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@@ -22,9 +22,13 @@ static void cpuwakeuphalt(struct limine_smp_info *info) {
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for (;;) CPU_HALT();
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}
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static long next_id = 1;
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static void cpuwakeup(struct limine_smp_info *info) {
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cpu_set((cpu_t *)info->extra_argument);
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current_cpu()->internal_id = __atomic_fetch_add(&next_id, 1, __ATOMIC_SEQ_CST);
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arch_gdt_reload();
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arch_idt_reload();
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interrupt_register(0xfd, (void *)cpuwakeuphalt, NULL, IPL_IGNORE);
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@@ -46,16 +50,32 @@ static void cpuwakeup(struct limine_smp_info *info) {
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}
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void arch_smp_sendipi(cpu_t *targcpu, isr_t *isr, int target, bool nmi) {
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arch_apic_sendipi(targcpu ? targcpu->id : 0, INTERRUPT_IDTOVECTOR(isr->id), target, nmi ? APIC_MODE_NMI : 0, 0);
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arch_apic_sendipi(targcpu ? targcpu->hardware_id : 0, INTERRUPT_IDTOVECTOR(isr->id), target, nmi ? APIC_MODE_NMI : 0, 0);
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}
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void arch_smp_haltallothers() {
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void arch_smp_haltallothers(void) {
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arch_smp_sendipi(NULL, ¤t_cpu()->isr[0xfd], ARCH_SMP_IPI_OTHERCPUS, true);
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}
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size_t arch_smp_get_cpu_count(void) {
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if (cmdline_get("nosmp"))
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return 1;
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struct limine_smp_response *response = smprequest.response;
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if (response == NULL)
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return 1;
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return response->cpu_count;
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}
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cpu_t **smp_cpus;
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void arch_smp_wakeup() {
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cpu_t *arch_smp_get_cpu_by_internal_id(long id) {
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__assert(smp_cpus && id < arch_smp_get_cpu_count());
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return smp_cpus[id];
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}
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void arch_smp_wakeup(void) {
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struct limine_smp_response *response = smprequest.response;
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if (response == NULL) {
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// TODO try to detect the other processors manually
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