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https://github.com/Mathewnd/Astral.git
synced 2026-10-28 21:28:21 +00:00
cpu: rename _cpu() to current_cpu()
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@@ -166,26 +166,26 @@ void arch_apic_initap() {
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interrupt_register(0xff, spurious, NULL, IPL_IGNORE);
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writelapic(APIC_REG_SPURIOUS, 0x1FF);
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_cpu()->id = readlapic(APIC_REG_ID) >> 24;
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current_cpu()->id = readlapic(APIC_REG_ID) >> 24;
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// get the acpi id for the local nmi sources
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for (size_t i = 0; i < lapiccount; ++i) {
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struct acpi_madt_lapic *current = getentry(ACPI_MADT_ENTRY_TYPE_LAPIC, i);
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if (_cpu()->id == current->id) {
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_cpu()->acpiid = current->uid;
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if (current_cpu()->id == current->id) {
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current_cpu()->acpiid = current->uid;
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break;
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}
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}
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printf("processor id: %lu (APIC) %lu (ACPI)\n", _cpu()->id, _cpu()->acpiid);
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printf("processor id: %lu (APIC) %lu (ACPI)\n", current_cpu()->id, current_cpu()->acpiid);
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isr_t *nmiisr = interrupt_allocate(nmi, NULL, IPL_MAX); // MAX IPL because NMI
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__assert(nmiisr);
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for (size_t i = 0; i < lapicnmicount; ++i) {
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struct acpi_madt_lapic_nmi* current = getentry(ACPI_MADT_ENTRY_TYPE_LAPIC_NMI, i);
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if (current->uid == _cpu()->acpiid || current->uid == 0xff)
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if (current->uid == current_cpu()->acpiid || current->uid == 0xff)
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writelapic(APIC_LVT_LINT0 + 0x10 * current->lint, (nmiisr->id & 0xff) | LVT_DELIVERY_NMI | (current->flags << 12));
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}
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}
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@@ -204,7 +204,7 @@ static time_t stoptimer() {
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}
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static void timerisr(isr_t *isr, context_t *context) {
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timer_isr(_cpu()->timer, context);
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timer_isr(current_cpu()->timer, context);
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}
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static void armtimer(time_t ticks) {
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@@ -233,12 +233,12 @@ void arch_apic_timerinit() {
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writelapic(APIC_TIMER_INITIALCOUNT, 0);
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printf("cpu%lu: local apic timer calibrated at %lu ticks per us. ISR vector %lu\n", _cpu()->id, ticksperus, vec);
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printf("cpu%lu: local apic timer calibrated at %lu ticks per us. ISR vector %lu\n", current_cpu()->id, ticksperus, vec);
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writelapic(APIC_LVT_TIMER, vec);
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_cpu()->timer = timer_new(ticksperus, armtimer, stoptimer);
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__assert(_cpu()->timer);
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current_cpu()->timer = timer_new(ticksperus, armtimer, stoptimer);
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__assert(current_cpu()->timer);
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}
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void arch_apic_sendipi(uint8_t cpu, uint8_t vec, uint8_t dest, uint8_t mode, uint8_t level) {
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@@ -21,18 +21,18 @@ typedef struct {
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} __attribute__((packed)) gdtr_t;
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void arch_gdt_reload() {
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memcpy(_cpu()->gdt, template, sizeof(template));
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uintptr_t istaddr = (uintptr_t)&_cpu()->ist;
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memcpy(current_cpu()->gdt, template, sizeof(template));
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uintptr_t istaddr = (uintptr_t)¤t_cpu()->ist;
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// add ist to gdt
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_cpu()->gdt[5] |= ((istaddr & 0xff000000) << 32) | ((istaddr & 0xff0000) << 16) | ((istaddr & 0xffff) << 16) | sizeof(ist_t);
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_cpu()->gdt[6] = (istaddr >> 32) & 0xffffffff;
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current_cpu()->gdt[5] |= ((istaddr & 0xff000000) << 32) | ((istaddr & 0xff0000) << 16) | ((istaddr & 0xffff) << 16) | sizeof(ist_t);
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current_cpu()->gdt[6] = (istaddr >> 32) & 0xffffffff;
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// reload gdt and ist
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gdtr_t gdtr = {
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.size = sizeof(template) - 1,
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.address = (uintptr_t)&_cpu()->gdt
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.address = (uintptr_t)¤t_cpu()->gdt
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};
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asm volatile("lgdt (%%rax)" : : "a"(&gdtr) : "memory");
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@@ -81,7 +81,7 @@ void arch_idt_reload() {
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for (int i = 0; i < 32; ++i)
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interrupt_register(i, exceptisr, NULL, IPL_IGNORE);
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_cpu()->ipl = IPL_NORMAL;
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current_cpu()->ipl = IPL_NORMAL;
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interrupt_set(true);
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}
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@@ -232,7 +232,7 @@ void arch_mmu_tlbshootdown(void *page) {
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mmupage = page;
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remaining = arch_smp_cpusawake - 1;
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arch_smp_sendipi(NULL, &_cpu()->isr[0xfe], ARCH_SMP_IPI_OTHERCPUS, false);
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arch_smp_sendipi(NULL, ¤t_cpu()->isr[0xfe], ARCH_SMP_IPI_OTHERCPUS, false);
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while (__atomic_load_n(&remaining, __ATOMIC_SEQ_CST)) CPU_PAUSE();
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@@ -44,7 +44,7 @@ void arch_smp_sendipi(cpu_t *targcpu, isr_t *isr, int target, bool nmi) {
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}
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void arch_smp_haltallothers() {
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arch_smp_sendipi(NULL, &_cpu()->isr[0xfd], ARCH_SMP_IPI_OTHERCPUS, true);
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arch_smp_sendipi(NULL, ¤t_cpu()->isr[0xfd], ARCH_SMP_IPI_OTHERCPUS, true);
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}
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void arch_smp_wakeup() {
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