From 21e6a0ad1aefc1623d1be2d5eac26ca00585086f Mon Sep 17 00:00:00 2001
From: Matheus <matheusuky@gmail.com>
Date: Mon, 15 Aug 2022 13:50:46 -0300
Subject: [PATCH] enable syscall instructions

---
 src/arch/x86_64/cpu.c              | 38 ++++++++++++++++++++++++++++++
 src/arch/x86_64/include/arch/cpu.h |  6 +++++
 src/arch/x86_64/include/arch/msr.h |  5 ++++
 src/arch/x86_64/main.c             |  2 ++
 src/arch/x86_64/smp.c              |  2 ++
 5 files changed, 53 insertions(+)
 create mode 100644 src/arch/x86_64/cpu.c
 create mode 100644 src/arch/x86_64/include/arch/cpu.h

diff --git a/src/arch/x86_64/cpu.c b/src/arch/x86_64/cpu.c
new file mode 100644
index 00000000..aecb8171
--- /dev/null
+++ b/src/arch/x86_64/cpu.c
@@ -0,0 +1,38 @@
+#include <arch/cpu.h>
+#include <arch/msr.h>
+#include <cpuid.h>
+#include <arch/cls.h>
+#include <stdio.h>
+
+// initialises things like 
+// syscall, sse, etc
+// for the current cpu
+
+void cpu_state_init(){
+	
+	// syscall
+
+	// does it exist
+	
+	int eax,ebx,ecx,edx;
+
+	__get_cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
+
+	if(edx & (1 << 11)){ // check for the syscall bit
+		uint64_t efer = rdmsr(MSR_EFER);
+		efer |= 1; // set syscall enable bit
+		wrmsr(MSR_EFER, efer);
+		
+		uint64_t star = 0;
+		star |= (uint64_t)0x28 << 48;
+		star |= (uint64_t)0x28 << 32;
+		
+		wrmsr(MSR_STAR, star);
+		wrmsr(MSR_LSTAR, 0xDEADBEEF); // FIXME add 64 bit handler here
+		wrmsr(MSR_CSTAR, 0); // no compat mode syscall handler
+		wrmsr(MSR_FMASK, 0x200); // disable interrupts on syscall
+	}
+	// undefined opcode exception will handle system calls then
+	else printf("CPU%lu: syscall instruction not supported\n", arch_getcls()->lapicid);
+
+}
diff --git a/src/arch/x86_64/include/arch/cpu.h b/src/arch/x86_64/include/arch/cpu.h
new file mode 100644
index 00000000..ae4779f8
--- /dev/null
+++ b/src/arch/x86_64/include/arch/cpu.h
@@ -0,0 +1,6 @@
+#ifndef _CPU_H_INCLUDE
+#define _CPU_H_INCLUDE
+
+void cpu_state_init();
+
+#endif
diff --git a/src/arch/x86_64/include/arch/msr.h b/src/arch/x86_64/include/arch/msr.h
index b991dd8a..3f687615 100644
--- a/src/arch/x86_64/include/arch/msr.h
+++ b/src/arch/x86_64/include/arch/msr.h
@@ -3,6 +3,11 @@
 
 #include <stdint.h>
 
+#define MSR_EFER 0xC0000080
+#define MSR_STAR 0xC0000081
+#define MSR_LSTAR 0xC0000082
+#define MSR_CSTAR 0xC0000083
+#define MSR_FMASK 0xC0000084
 #define MSR_FSBASE 0xC0000100
 #define MSR_GSBASE 0xC0000101
 #define MSR_KERNELGSBASE 0xC0000102
diff --git a/src/arch/x86_64/main.c b/src/arch/x86_64/main.c
index 09f7474f..85dba4c8 100644
--- a/src/arch/x86_64/main.c
+++ b/src/arch/x86_64/main.c
@@ -92,6 +92,8 @@ void kmain(){
 
 	pci_enumerate();
 
+	cpu_state_init();
+
 	sched_init();
 
 	smp_init();
diff --git a/src/arch/x86_64/smp.c b/src/arch/x86_64/smp.c
index a6529029..142d13e0 100644
--- a/src/arch/x86_64/smp.c
+++ b/src/arch/x86_64/smp.c
@@ -30,6 +30,8 @@ static void apstartup(struct limine_smp_info *info){
 	apic_lapicinit();
 	
 	timer_init();
+	
+	cpu_state_init();
 
 	printf("CPU %lu ready!\n", info->lapic_id);