From 881acb984d55513fe3abac341cdd3910aea8f0d3 Mon Sep 17 00:00:00 2001 From: Matheus Date: Tue, 13 Dec 2022 23:42:50 -0300 Subject: [PATCH] x86_64 interrupts: gpf isr and add support for the user safe memops --- src/arch/x86_64/idt.c | 2 ++ src/arch/x86_64/include/arch/isr.h | 1 + src/arch/x86_64/isr.asm | 1 + src/arch/x86_64/isr.c | 31 +++++++++++++++++++++++++++--- 4 files changed, 32 insertions(+), 3 deletions(-) diff --git a/src/arch/x86_64/idt.c b/src/arch/x86_64/idt.c index a351fbf8..7f704fc1 100644 --- a/src/arch/x86_64/idt.c +++ b/src/arch/x86_64/idt.c @@ -56,6 +56,8 @@ void idt_bspinit(){ idt_setentry(&idt[VECTOR_PF], asmisr_pagefault, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0); + idt_setentry(&idt[VECTOR_GPF], asmisr_gpf, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0); + idt_setentry(&idt[VECTOR_DEVUNAVAILABLE], asmisr_nm, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0); idt_setentry(&idt[VECTOR_PANIC], asmisr_panic, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0); diff --git a/src/arch/x86_64/include/arch/isr.h b/src/arch/x86_64/include/arch/isr.h index a7aef04d..e4a11e49 100644 --- a/src/arch/x86_64/include/arch/isr.h +++ b/src/arch/x86_64/include/arch/isr.h @@ -14,5 +14,6 @@ extern void asmisr_ps2kbd(); extern void asmisr_timer(); extern void asmisr_simd(); extern void asmisr_nm(); +extern void asmisr_gpf(); #endif diff --git a/src/arch/x86_64/isr.asm b/src/arch/x86_64/isr.asm index c2ff7da2..19997718 100644 --- a/src/arch/x86_64/isr.asm +++ b/src/arch/x86_64/isr.asm @@ -153,6 +153,7 @@ asmisr_panic: jmp .hlt ; NMI stuff except asmisr_pagefault, isr_pagefault, 0xE +except asmisr_gpf, isr_gpf, 0xD except asmisr_nm, isr_except, 0x7 isr asmisr_general, isr_general, 0xFF except asmisr_except, isr_except, 0xFF diff --git a/src/arch/x86_64/isr.c b/src/arch/x86_64/isr.c index b15a6653..9682de5e 100644 --- a/src/arch/x86_64/isr.c +++ b/src/arch/x86_64/isr.c @@ -3,6 +3,9 @@ #include #include #include +#include +#include +#include void isr_simd(arch_regs *reg){ @@ -21,14 +24,36 @@ void isr_general(arch_regs *reg, int n){ } void isr_except(arch_regs *reg, int n){ + printf("exception %d", n); _panic("CPU Exception", reg); } -void isr_pagefault(arch_regs *reg){ +void isr_gpf(arch_regs* reg){ - if(!vmm_dealwithrequest(reg->cr2, reg->error, reg->cs == 0x3b)) - _panic("Page fault!", reg); + arch_getcls()->thread->umemoperror = EFAULT; + + if(arch_getcls()->thread->umemopfailaddr == NULL) + _panic("General protection fault!", reg); + else + reg->rip = (uint64_t)arch_getcls()->thread->umemopfailaddr; + + + +} + +void isr_pagefault(arch_regs *reg){ + int error = vmm_dealwithrequest(reg->cr2, reg->error, reg->cs == 0x3b); + + if(error){ + if(arch_getcls()->thread->umemopfailaddr == NULL){ + _panic("Page fault!", reg); + } + else{ + reg->rip = (uint64_t)arch_getcls()->thread->umemopfailaddr; + arch_getcls()->thread->umemoperror = error; + } + } }