diff --git a/src/arch/x86_64/idt.c b/src/arch/x86_64/idt.c
index 0cf973cf..80e3ce8e 100644
--- a/src/arch/x86_64/idt.c
+++ b/src/arch/x86_64/idt.c
@@ -36,6 +36,4 @@ void idt_bspinit(){
 	
 	idt_reload();
 
-	asm("int $0x0");
-
 }
diff --git a/src/arch/x86_64/include/arch/cls.h b/src/arch/x86_64/include/arch/cls.h
index 474ea2f3..7fa1eaf0 100644
--- a/src/arch/x86_64/include/arch/cls.h
+++ b/src/arch/x86_64/include/arch/cls.h
@@ -3,6 +3,8 @@
 
 #include <arch/gdt.h>
 #include <arch/ist.h>
+#include <arch/ist.h>
+#include <arch/regs.h>
 
 // cpu level storage
 // this will be pointed to by GS and will contain per cpu info
@@ -10,6 +12,7 @@
 typedef struct{
 	gdt_t gdt;
 	ist_t ist;
+	arch_regserror *laststate;
 } cls_t;
 
 void bsp_setcls();
diff --git a/src/arch/x86_64/include/arch/isr.h b/src/arch/x86_64/include/arch/isr.h
index 57927a38..b1fc9cb0 100644
--- a/src/arch/x86_64/include/arch/isr.h
+++ b/src/arch/x86_64/include/arch/isr.h
@@ -1,8 +1,10 @@
 #ifndef _ISR_H_INCLUDE
 #define _ISR_H_INCLUDE
 
-extern void asmisr_general(void*);
-extern void asmisr_except(void*);
+#include <arch/regs.h>
+
+extern void asmisr_general(arch_regsnoerror*);
+extern void asmisr_except(arch_regserror*);
 
 
 
diff --git a/src/arch/x86_64/include/arch/panic.h b/src/arch/x86_64/include/arch/panic.h
index 00fc26ab..be854c85 100644
--- a/src/arch/x86_64/include/arch/panic.h
+++ b/src/arch/x86_64/include/arch/panic.h
@@ -1,6 +1,8 @@
 #ifndef _PANIC_H_INCLUDE
 #define _PANIC_H_INCLUDE
 
-__attribute__((noreturn)) void _panic(char *reason);
+#include <arch/regs.h>
+
+__attribute__((noreturn)) void _panic(char *reason, arch_regserror *reg);
 
 #endif
diff --git a/src/arch/x86_64/include/arch/regs.h b/src/arch/x86_64/include/arch/regs.h
new file mode 100644
index 00000000..25192d86
--- /dev/null
+++ b/src/arch/x86_64/include/arch/regs.h
@@ -0,0 +1,15 @@
+#ifndef _REGS_H_INCLUDE
+#define _REGS_H_INCLUDE
+
+#include <stdint.h>
+
+typedef struct{
+        uint64_t cr2,gs,fs,es,ds,rax,rbx,rcx,rdx,r8,r9,r10,r11,r12,r13,r14,r15,rdi,rsi,rbp,error,rip,cs,rflags,rsp,ss;
+} arch_regserror;
+
+typedef struct{
+        uint64_t cr2,gs,fs,es,ds,rax,rbx,rcx,rdx,r8,r9,r10,r11,r12,r13,r14,r15,rdi,rsi,rbp,rip,cs,rflags,rsp,ss;
+} arch_regsnoerror;
+
+
+#endif
diff --git a/src/arch/x86_64/isr.c b/src/arch/x86_64/isr.c
index dd19f0be..5ec12e6c 100644
--- a/src/arch/x86_64/isr.c
+++ b/src/arch/x86_64/isr.c
@@ -1,16 +1,16 @@
 #include <arch/isr.h>
 #include <arch/panic.h>
 
-void isr_general(void*){
-	_panic("Unhandled interrupt");
+void isr_general(arch_regsnoerror *reg){
+	_panic("Unhandled interrupt", 0);
 	asm("hlt");
 }
 
-void isr_except(void*){
-	_panic("CPU Exception");
+void isr_except(arch_regserror *reg){
+	_panic("CPU Exception", reg);
 	asm("hlt;");
 }
 
 void isr_pagefault(void*){
-
+	
 }
diff --git a/src/arch/x86_64/panic.c b/src/arch/x86_64/panic.c
index 2d1c5576..73b60aa5 100644
--- a/src/arch/x86_64/panic.c
+++ b/src/arch/x86_64/panic.c
@@ -1,11 +1,41 @@
 #include <arch/panic.h>
+#include <arch/regs.h>
 #include <stdio.h>
+#include <stddef.h>
 
-__attribute((noreturn)) void _panic(char* reason){
+#define TRACE_MAXDEPTH 10
+
+// TODO trace names
+
+static void tracestack(uint64_t** addr){
 	
-	// TODO stack trace and register print
+	for(size_t depth = 0; depth < TRACE_MAXDEPTH; ++depth){
+
+		uint64_t *calleeaddr = *(addr + 1);
+		addr = (uint64_t**)*addr;
+
+		printf("%lu: %p\n", depth, calleeaddr);
+
+		if(depth == TRACE_MAXDEPTH || calleeaddr == 0) break;
+	}
+}
+
+__attribute((noreturn)) void _panic(char* reason, arch_regserror *reg){
+	
+	printf("PANIC: %s.\n", reason);
+	
+	if(reg){
+		printf("Register dump:\nRAX: %p RBX: %p RCX: %p RDX: %p R8: %p R9: %p R10: %p R11: %p R12: %p R13: %p R14: %p R15: %p RDI: %p RSP: %p RBP: %p DS: %p ES: %p FS: %p GS: %p CR2: %p ERR: %p RIP: %p CS: %p RFLAGS: %p SS: %p\n",
+		reg->rax, reg->rbx, reg->rcx, reg->rdx, reg->r8, reg->r9, reg->r10,
+		reg->r11, reg->r12, reg->r13, reg->r14, reg->r15, reg->rdi, reg->rsp, reg->rbp, reg->ds, reg->es, reg->fs, reg->gs, reg->cr2, reg->error, reg->rip, reg->cs, reg->rflags, reg->ss
+		);
+
+		printf("Panic location: %p\n", reg->rip);
+		printf("Stack trace:\n");
+		tracestack((uint64_t**)reg->rbp);
+
+	}
 	
-	printf("Kernel panic.\nWhy: %s\nWhere: TODO\nWho: TODO\n", reason);
 
 	while(1){
 		asm("cli;hlt;");