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xhci: support ehci companions and add more portsc bits
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@@ -22,6 +22,7 @@
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#define PCI_CONFIG_REVISION 0x8
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#define PCI_CONFIG_PROGIF 0x9
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#define PCI_PROGIF_STORAGE_SATA_AHCI 0x1
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#define PCI_PROGIF_USB_EHCI 0x20
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#define PCI_PROGIF_USB_XHCI 0x30
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#define PCI_CONFIG_SUBCLASS 0xa
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#define PCI_SUBCLASS_STORAGE_NVM 0x8
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@@ -200,10 +200,16 @@ _Static_assert(sizeof(xhci_input_ctx_t) == XHCI_CONTEXT_SIZE, "xHCI input contro
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#define XHCI_PORTSC_PP (1 << 9) // port power
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#define XHCI_PORTSC_CSC (1 << 17) // connect status change
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#define XHCI_PORTSC_PEC (1 << 18) // port enabled change
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#define XHCI_PORTSC_WRC (1 << 19) // warm reset change
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#define XHCI_PORTSC_OCC (1 << 20) // over current change
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#define XHCI_PORTSC_PRC (1 << 21) // port reset change
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#define XHCI_PORTSC_PLC (1 << 22) // port link state change
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#define XHCI_PORTSC_CEC (1 << 23) // config error change
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#define XHCI_PORTSC_CAS (1 << 24) // cold attach status
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#define XHCI_PORTSC_DR (1 << 30) // device removable
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#define XHCI_PORTSC_WPR (1u << 31) // warm port reset
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#define XHCI_PORTSC_CHANGE_BITS (XHCI_PORTSC_CSC | XHCI_PORTSC_PEC | XHCI_PORTSC_OCC | XHCI_PORTSC_PRC)
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#define XHCI_PORTSC_CHANGE_BITS (XHCI_PORTSC_CSC | XHCI_PORTSC_PEC | XHCI_PORTSC_WRC | XHCI_PORTSC_OCC | XHCI_PORTSC_PRC | XHCI_PORTSC_PLC | XHCI_PORTSC_CEC)
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#define XHCI_PORTSC_PRESERVE_BITS XHCI_PORTSC_PP
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#define XHCI_TRB_DW2_TR_LEN(LEN) (uint32_t)((LEN) & 0x1ffff)
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