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interrupts: simd exception

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Matheus
2022-09-23 21:36:37 -03:00
parent 364e620ce9
commit bedd2f625e
5 changed files with 19 additions and 4 deletions
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src/arch/x86_64/idt.c
+4 -2
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@@ -41,16 +41,18 @@ void idt_bspinit(){
for(size_t i = 0; i < 256; ++i){ for(size_t i = 0; i < 256; ++i){
idt_setentry(&idt[i], asmisr_general, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0); idt_setentry(&idt[i], asmisr_general, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0);
} }
// set error code pushers as exceptions // set error code pushers as exceptions
idt_setentry(&idt[VECTOR_DOUBLEFAULT], asmisr_except, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0); idt_setentry(&idt[VECTOR_DOUBLEFAULT], asmisr_except, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0);
idt_setentry(&idt[VECTOR_GPF], asmisr_except, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0); idt_setentry(&idt[VECTOR_GPF], asmisr_except, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0);
idt_setentry(&idt[VECTOR_INVALIDTSS], asmisr_except, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0); idt_setentry(&idt[VECTOR_INVALIDTSS], asmisr_except, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0);
idt_setentry(&idt[VECTOR_SEGMENTNOTPRESENT], asmisr_except, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0); idt_setentry(&idt[VECTOR_SEGMENTNOTPRESENT], asmisr_except, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0);
idt_setentry(&idt[VECTOR_STACK], asmisr_except, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0); idt_setentry(&idt[VECTOR_STACK], asmisr_except, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0);
idt_setentry(&idt[VECTOR_SIMD], asmisr_simd, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0);
idt_setentry(&idt[VECTOR_PF], asmisr_pagefault, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0); idt_setentry(&idt[VECTOR_PF], asmisr_pagefault, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0);
idt_setentry(&idt[VECTOR_PANIC], asmisr_panic, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0); idt_setentry(&idt[VECTOR_PANIC], asmisr_panic, 0x28, FLAGS_PRESENT | FLAGS_TYPE_INTERRUPT, 0);
src/arch/x86_64/include/arch/idt.h
+2
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@@ -24,6 +24,8 @@
#define VECTOR_GPF 13 #define VECTOR_GPF 13
#define VECTOR_PF 14 #define VECTOR_PF 14
#define VECTOR_SIMD 0x13
#define VECTOR_PANIC 0x20 #define VECTOR_PANIC 0x20
#define VECTOR_LAPICNMI 0x21 #define VECTOR_LAPICNMI 0x21
#define VECTOR_MMUINVAL 0x22 #define VECTOR_MMUINVAL 0x22
src/arch/x86_64/include/arch/isr.h
+1
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@@ -12,5 +12,6 @@ extern void asmisr_lapicnmi();
extern void asmisr_mmuinval(); extern void asmisr_mmuinval();
extern void asmisr_ps2kbd(); extern void asmisr_ps2kbd();
extern void asmisr_timer(); extern void asmisr_timer();
extern void asmisr_simd();
#endif #endif
src/arch/x86_64/isr.asm
+1
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@@ -157,3 +157,4 @@ isr asmisr_lapicnmi, isr_lapicnmi
isr asmisr_mmuinval, isr_mmuinval isr asmisr_mmuinval, isr_mmuinval
isr asmisr_ps2kbd, isr_ps2kbd isr asmisr_ps2kbd, isr_ps2kbd
isr asmisr_timer, isr_timer isr asmisr_timer, isr_timer
isr asmisr_simd, isr_simd
src/arch/x86_64/isr.c
+11 -2
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@@ -4,14 +4,23 @@
#include <arch/apic.h> #include <arch/apic.h>
#include <kernel/timer.h> #include <kernel/timer.h>
void isr_simd(arch_regs *reg){
uint64_t mxcsr;
asm volatile("stmxcsr (%%rax)" : : "a"(&mxcsr));
printf("SIMD: %p\n", mxcsr);
_panic("SIMD exception", reg);
}
void isr_general(arch_regs *reg){ void isr_general(arch_regs *reg){
_panic("Unhandled interrupt", reg); _panic("Unhandled interrupt", reg);
asm("hlt");
} }
void isr_except(arch_regs *reg){ void isr_except(arch_regs *reg){
_panic("CPU Exception", reg); _panic("CPU Exception", reg);
asm("hlt;");
} }
void isr_pagefault(arch_regs *reg){ void isr_pagefault(arch_regs *reg){