From c54d618c8243bf72db83cdcd2621968d72dc5cd1 Mon Sep 17 00:00:00 2001 From: Matheus Date: Thu, 16 Apr 2026 18:00:33 -0300 Subject: [PATCH] x86-64: handle some more exceptions properly --- kernel-src/arch/x86-64/cpu.c | 16 ++++++++++++++-- kernel-src/arch/x86-64/mmu.c | 2 ++ 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/kernel-src/arch/x86-64/cpu.c b/kernel-src/arch/x86-64/cpu.c index 2a5fe250..106ae73e 100644 --- a/kernel-src/arch/x86-64/cpu.c +++ b/kernel-src/arch/x86-64/cpu.c @@ -22,7 +22,7 @@ static void illisr(isr_t *self, context_t *ctx) { } } -static void div0isr(isr_t *self, context_t *ctx) { +static void sigfpeisr(isr_t *self, context_t *ctx) { if (ARCH_CONTEXT_ISUSER(ctx)) { signal_signalthread(current_thread(), SIGFPE, true); } else { @@ -46,6 +46,14 @@ static void x87isr(isr_t *self, context_t *ctx) { } } +static void dbisr(isr_t *self, context_t *ctx) { + if (ARCH_CONTEXT_ISUSER(ctx)) { + signal_signalthread(current_thread(), SIGTRAP, true); + } else { + _panic("Debug Exception", ctx); + } +} + static void reload_ldt(isr_t *self, context_t *ctx) { if (current_thread() == NULL || current_thread()->proc == NULL || current_thread()->proc->ldt == NULL) return; @@ -221,7 +229,11 @@ void arch_cpu_init() { x86_64_mmu_enable_global_pages(); // register some exception handlers that give out signals - interrupt_register(0, div0isr, NULL, IPL_IGNORE); + interrupt_register(0, sigfpeisr, NULL, IPL_IGNORE); + interrupt_register(1, dbisr, NULL, IPL_IGNORE); + interrupt_register(3, dbisr, NULL, IPL_IGNORE); + interrupt_register(4, sigfpeisr, NULL, IPL_IGNORE); + interrupt_register(5, sigfpeisr, NULL, IPL_IGNORE); interrupt_register(6, illisr, NULL, IPL_IGNORE); interrupt_register(16, x87isr, NULL, IPL_IGNORE); interrupt_register(19, simdisr, NULL, IPL_IGNORE); diff --git a/kernel-src/arch/x86-64/mmu.c b/kernel-src/arch/x86-64/mmu.c index 87a2b57f..531aeb77 100644 --- a/kernel-src/arch/x86-64/mmu.c +++ b/kernel-src/arch/x86-64/mmu.c @@ -422,6 +422,8 @@ INIT_ROUTINE_DEFINE(mmu, INIT_ROUTINE_FLAGS_NONE, arch_mmu_init, pmm); void arch_mmu_apswitch() { arch_mmu_switch(FROM_HHDM(template)); + interrupt_register(11, gpfisr, NULL, IPL_IGNORE); + interrupt_register(12, gpfisr, NULL, IPL_IGNORE); interrupt_register(13, gpfisr, NULL, IPL_IGNORE); interrupt_register(14, pfisr, NULL, IPL_IGNORE); interrupt_register(0xfe, arch_mmu_tlbipi, ARCH_EOI, IPL_IGNORE);