mirror of
https://github.com/Mathewnd/Astral.git
synced 2026-10-30 05:58:22 +00:00
signals: handle SIGBUS, SIGSEGV, SIGILL etc
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@@ -7,6 +7,21 @@
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#define EFER_SYSCALLENABLE 1
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void arch_syscall_entry();
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static void illisr(isr_t *self, context_t *ctx) {
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if (ARCH_CONTEXT_ISUSER(ctx)) {
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signal_signalthread(_cpu()->thread, SIGILL, true);
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} else {
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_panic("Invalid Opcode", ctx);
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}
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}
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static void div0isr(isr_t *self, context_t *ctx) {
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if (ARCH_CONTEXT_ISUSER(ctx)) {
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signal_signalthread(_cpu()->thread, SIGFPE, true);
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} else {
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_panic("Division by 0", ctx);
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}
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}
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void cpu_initstate() {
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arch_apic_initap();
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@@ -49,4 +64,7 @@ void cpu_initstate() {
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"mov %%rax, %%cr0;"
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: : : "rax"
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);
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interrupt_register(0, div0isr, NULL, IPL_IGNORE);
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interrupt_register(6, illisr, NULL, IPL_IGNORE);
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}
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@@ -278,10 +278,17 @@ static void pfisr(isr_t *self, context_t *ctx) {
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if (ARCH_CONTEXT_ISUSER(ctx))
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signal_signalthread(_cpu()->thread, SIGSEGV, true);
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else
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_panic("Page fault", ctx);
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_panic("Page Fault", ctx);
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}
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}
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static void gpfisr(isr_t *self, context_t *ctx) {
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if (ARCH_CONTEXT_ISUSER(ctx))
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signal_signalthread(_cpu()->thread, SIGSEGV, true);
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else
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_panic("General Protection Fault", ctx);
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}
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void arch_mmu_init() {
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template = pmm_allocpage(PMM_SECTION_DEFAULT);
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__assert(template);
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@@ -326,6 +333,7 @@ void arch_mmu_init() {
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void arch_mmu_apswitch() {
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arch_mmu_switch(FROM_HHDM(template));
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interrupt_register(13, gpfisr, NULL, IPL_IGNORE);
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interrupt_register(14, pfisr, NULL, IPL_IGNORE);
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interrupt_register(0xfe, arch_mmu_tlbipi, ARCH_EOI, IPL_IGNORE);
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}
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