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refactor: use root instead of base
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@@ -1,13 +1,13 @@
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const b = @import("base");
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const pl = b.pl;
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const amd64 = b.arch;
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const r = @import("root");
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const pl = r.pl;
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const amd64 = r.arch;
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const std = @import("std");
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const tsc = @import("tsc.zig");
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const pvclock = @import("pvclock.zig");
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const apic = @import("apic.zig");
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const smp = @import("smp.zig");
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const ki = b.ke.private;
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const ki = r.ke.private;
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pub const name = "PC";
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@@ -15,7 +15,7 @@ const com1 = 0x3F8;
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const log = std.log.scoped(.@"amd64/pc");
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fn com1_init() linksection(b.init) void {
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fn com1_init() linksection(r.init) void {
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amd64.outb(com1 + 0x3, 0x80);
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amd64.outb(com1 + 0x0, 0x0c);
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amd64.outb(com1 + 0x1, 0x00);
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@@ -32,7 +32,7 @@ fn com1_write(c: u8) void {
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amd64.outb(com1, c);
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}
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pub fn early_init(boot_info: *pl.BootInfo) linksection(b.init) void {
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pub fn early_init(boot_info: *pl.BootInfo) linksection(r.init) void {
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com1_init();
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const f = amd64.cpu_features;
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@@ -79,7 +79,7 @@ pub fn init_ap() void {
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apic.init_local();
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}
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pub fn late_init(boot_info: *pl.BootInfo) linksection(b.init) void {
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pub fn late_init(boot_info: *pl.BootInfo) linksection(r.init) void {
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pl.acpi.init(boot_info);
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if (amd64.hypervisor.info) |hv| {
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