riscv64: initial risc-v port

This commit is contained in:
2026-09-28 00:09:01 +02:00
committed by rdmsr
parent d03251d3e0
commit 2c20f0b456
21 changed files with 839 additions and 9 deletions
+2 -2
View File
@@ -62,8 +62,8 @@ pub fn addRun(b: *std.Build, kernel: *std.Build.Step.Compile, loader: *std.Build
if (!debug and builtin.target.os.tag == .linux and builtin.cpu.arch == .x86_64) qemu.addArgs(&.{ "-enable-kvm", "-cpu", "host,+invtsc" });
},
.aarch64 => qemu.addArgs(&.{ "-machine", "virt", "-cpu", "cortex-a57" }),
.riscv64 => qemu.addArgs(&.{ "-machine", "virt" }),
.aarch64 => qemu.addArgs(&.{ "-machine", "virt", "-cpu", "cortex-a57", "-device", "ramfb" }),
.riscv64 => qemu.addArgs(&.{ "-machine", "virt", "-m", "1G", "-device", "ramfb" }),
else => {},
}