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riscv64: initial risc-v port

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Marvin
2026-09-28 00:09:01 +02:00
committed by rdmsr
parent d03251d3e0
commit 2c20f0b456
21 changed files with 839 additions and 9 deletions
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build.zig
+9 -1
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@@ -223,6 +223,10 @@ fn addKernel(b: *std.Build, plat: config.Platform, optimize: std.builtin.Optimiz
kernel.root_module.addAssemblyFile(b.path("src/kern/amd64/locore.s"));
kernel.root_module.addAssemblyFile(b.path("src/platform/pc/ap.s"));
},
.riscv64 => {
kernel.root_module.addAssemblyFile(b.path("src/kern/riscv64/locore.s"));
kernel.root_module.addAssemblyFile(b.path("src/platform/riscv64/trap.s"));
},
else => {},
}
@@ -248,7 +252,11 @@ fn addLoader(b: *std.Build, plat: config.Platform, optimize: std.builtin.Optimiz
loader.root_module.addImport("arch", arch_module);
loader.root_module.addImport("config", config_module);
loader.root_module.addImport("rtl", rtl);
loader.root_module.addAssemblyFile(b.path("src/loader/jump.s"));
switch (plat.arch) {
.x86_64 => loader.root_module.addAssemblyFile(b.path("src/loader/x86_64/jump.s")),
.riscv64 => loader.root_module.addAssemblyFile(b.path("src/loader/riscv64/jump.s")),
else => {},
}
loader.use_llvm = true;
loader.use_lld = true;