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ke: optimize IPL operations
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@@ -146,3 +146,30 @@ pub inline fn flush_full_tlb() void {
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pub inline fn flush_tlb(va: r.VAddr) void {
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amd64.invlpg(va);
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}
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// Inline asm so the compiler has a chance to inline it.
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pub inline fn raise_software_ipl(new: ke.Ipl, old: *ke.Ipl) bool {
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return asm volatile (
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\\movb %%gs:cpu_ipl, %%cl
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\\movb %%cl, (%[old_ptr])
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\\movb %[new_val], %%gs:cpu_ipl
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\\cmpb %%cl, %[new_val]
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\\setl %[result]
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: [result] "=r" (-> bool),
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: [new_val] "r" (new),
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[old_ptr] "r" (old),
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: .{ .rcx = true, .memory = true });
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}
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pub inline fn lower_software_ipl(new: ke.Ipl, old: *ke.Ipl) bool {
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return asm volatile (
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\\movb %%gs:cpu_ipl, %%cl
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\\movb %%cl, (%[old_ptr])
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\\movb %[new_val], %%gs:cpu_ipl
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\\cmpb %[new_val], %%cl
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\\setl %[result]
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: [result] "=r" (-> bool),
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: [new_val] "r" (new),
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[old_ptr] "r" (old),
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: .{ .rcx = true, .memory = true });
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}
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