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https://github.com/rdmsr/zag.git
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feat: amd64 interrupts
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@@ -0,0 +1,73 @@
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const amd64 = @import("arch");
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const std = @import("std");
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const b = @import("base");
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extern const __interrupt_vectors: [256]usize;
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var idt: [256]amd64.IdtEntry align(16) = undefined;
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const exception_msg = [32][]const u8{
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"Divide Error",
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"Debug",
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"Non-Maskable Interrupt",
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"Breakpoint",
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"Overflow",
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"Bound Range Exceeded",
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"Invalid Opcode",
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"Device Not Available",
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"Double Fault",
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"Coprocessor Segment Overrun",
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"Invalid TSS",
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"Segment Not Present",
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"Stack-Segment Fault",
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"General Protection Fault",
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"Page Fault",
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"???",
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"x87 Floating-Point Exception",
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"Alignment Check",
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"Machine Check",
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"SIMD Floating-Point Exception",
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"Virtualization Exception",
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"Control Protection Exception",
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"???",
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"???",
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"???",
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"???",
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"???",
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"???",
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"???",
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"???",
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"???",
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"Security Exception",
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};
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export fn isr_handler_main(frame: *const amd64.IrqFrame) callconv(.{ .x86_64_sysv = .{} }) void {
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if (frame.intno < 32) {
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std.log.info("Unhandled exception: 0x{x} ({s}), err=0x{x}, pc=0x{x}", .{ frame.intno, exception_msg[frame.intno], frame.errcode, frame.rip });
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std.log.info("RAX=0x{x:0>16} RBX=0x{x:0>16} RCX=0x{x:0>16} RDX=0x{x:0>16}", .{ frame.rax, frame.rbx, frame.rcx, frame.rdx });
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std.log.info("RSI=0x{x:0>16} RDI=0x{x:0>16} RBP=0x{x:0>16} RSP=0x{x:0>16}", .{ frame.rsi, frame.rdi, frame.rbp, frame.rsp });
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std.log.info("R8= 0x{x:0>16} R9=0x{x:0>16} R10=0x{x:0>16} R11=0x{x:0>16}", .{ frame.r8, frame.r9, frame.r10, frame.r11 });
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std.log.info("R12=0x{x:0>16} R13=0x{x:0>16} R14=0x{x:0>16} R15=0x{x:0>16}", .{ frame.r12, frame.r13, frame.r14, frame.r15 });
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const cr2 = amd64.read_cr(2);
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const cr3 = amd64.read_cr(3);
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const rflags = amd64.rflags();
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std.log.info("CR2=0x{x:0>16} CR3=0x{x:0>16} RFLAGS={x}", .{ cr2, cr3, @as(u64, @bitCast(rflags)) });
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@panic("Unhandled exception");
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}
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}
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extern fn idt_load(idt_ptr: *const amd64.Idtr) callconv(.{ .x86_64_sysv = .{} }) void;
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pub fn init() linksection(b.init) void {
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const idtr: amd64.Idtr = .{
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.limit = @sizeOf(@TypeOf(idt)) - 1,
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.base = @intFromPtr(&idt),
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};
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for (&idt, 0..256) |*entry, i| {
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entry.* = .init(0x28, 0, .InterruptGate, __interrupt_vectors[i]);
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}
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idt_load(&idtr);
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}
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