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https://github.com/rdmsr/zag.git
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all: tidy
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+44
-73
@@ -1,5 +1,6 @@
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//! Wrappers over amd64 CPU definitions and CPUID.
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const std = @import("std");
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const assert = std.debug.assert;
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pub const hypervisor = @import("hypervisor.zig");
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@@ -286,14 +287,14 @@ pub const Cr4 = packed struct(u64) {
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};
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pub inline fn read_cr(comptime n: u8) u64 {
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comptime std.debug.assert(n != 1);
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comptime assert(n != 1);
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return asm volatile (std.fmt.comptimePrint("mov %%cr{}, %[ret]", .{n})
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: [ret] "=r" (-> u64),
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);
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}
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pub inline fn write_cr(comptime n: u8, value: u64) void {
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comptime std.debug.assert(n != 1);
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comptime assert(n != 1);
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asm volatile (std.fmt.comptimePrint("mov %[value], %%cr{}", .{n})
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:
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: [value] "r" (value),
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@@ -519,23 +520,23 @@ const known_vendors = [_]struct {
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};
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pub const CpuFeatures = struct {
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x2apic: bool,
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five_level_paging: bool,
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gib_pages: bool,
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tsc_deadline: bool,
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fxsave: bool,
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xsave: bool,
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invariant_tsc: bool,
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nx: bool,
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pcid: bool,
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smap: bool,
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smep: bool,
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pge: bool,
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syscall: bool,
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umip: bool,
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vendor: CpuVendor,
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family: u8,
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brand_string: [48]u8,
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x2apic: bool = false,
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five_level_paging: bool = false,
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gib_pages: bool = false,
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tsc_deadline: bool = false,
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fxsave: bool = false,
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xsave: bool = false,
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invariant_tsc: bool = false,
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nx: bool = false,
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pcid: bool = false,
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smap: bool = false,
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smep: bool = false,
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pge: bool = false,
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syscall: bool = false,
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umip: bool = false,
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vendor: CpuVendor = undefined,
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family: u8 = 0,
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brand_string: [48]u8 = undefined,
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};
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pub const HypervisorVendor = enum(u32) {
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@@ -563,71 +564,59 @@ fn detect_vendor(string: [12]u8) CpuVendor {
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pub fn detect_cpu_features() void {
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const vendor_info = CpuidRequest.execute(.VendorInfo);
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const max_ext = CpuidRequest.execute(.HighestExtendedFunction).eax;
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const max_basic = vendor_info.eax;
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var x2apic = false;
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var five_level_paging = false;
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var gib_pages = false;
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var tsc_deadline = false;
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var xsave = false;
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var fxsave = false;
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var invtsc = false;
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var nx = false;
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var pcid = false;
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var smap = false;
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var smep = false;
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var pge = false;
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var hypervisor_flag = false;
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var syscall = false;
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var family: u8 = 0;
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var umip = false;
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var vendor_string: [12]u8 = undefined;
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var brand_string: [48]u8 = undefined;
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cpu_features = .{};
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std.mem.writeInt(u32, vendor_string[0..4], vendor_info.ebx, .little);
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std.mem.writeInt(u32, vendor_string[4..8], vendor_info.edx, .little);
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std.mem.writeInt(u32, vendor_string[8..12], vendor_info.ecx, .little);
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const vendor = detect_vendor(vendor_string);
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cpu_features.vendor = detect_vendor(vendor_string);
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if (max_basic >= 0x1) {
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const r = CpuidRequest.execute(.FeatureInfo);
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const ecx: FeatureInfoEcx = @bitCast(r.ecx);
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const edx: FeatureInfoEdx = @bitCast(r.edx);
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x2apic = ecx.x2apic;
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tsc_deadline = ecx.tsc_deadline;
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xsave = ecx.xsave;
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pcid = ecx.pcid;
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fxsave = edx.fxsave;
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pge = edx.pge;
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cpu_features.x2apic = ecx.x2apic;
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cpu_features.tsc_deadline = ecx.tsc_deadline;
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cpu_features.xsave = ecx.xsave;
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cpu_features.pcid = ecx.pcid;
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cpu_features.fxsave = edx.fxsave;
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cpu_features.pge = edx.pge;
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hypervisor_flag = ecx.hypervisor;
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const sig = r.eax;
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family = @truncate((sig >> 8) & 0xf);
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var family: u8 = @truncate((sig >> 8) & 0xf);
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if (family == 0xf) {
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family +%= @truncate((sig >> 20) & 0xff);
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}
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cpu_features.family = family;
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}
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if (max_basic >= 0x7) {
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const r = CpuidRequest.execute(.{ .ExtendedFeatures = .First });
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const ecx: ExtendedFeaturesEcx = @bitCast(r.ecx);
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const ebx: ExtendedFeaturesEbx = @bitCast(r.ebx);
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smap = ebx.smap;
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smep = ebx.smep;
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five_level_paging = ecx.la57;
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umip = ecx.umip;
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cpu_features.smap = ebx.smap;
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cpu_features.smep = ebx.smep;
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cpu_features.five_level_paging = ecx.la57;
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cpu_features.umip = ecx.umip;
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}
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if (max_ext >= 0x80000001) {
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const r = CpuidRequest.execute(.ExtendedInfo);
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const edx: ExtendedProcessorInfoEdx = @bitCast(r.edx);
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gib_pages = edx.pdpe1gb;
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nx = edx.nx;
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syscall = edx.syscall_sysret;
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cpu_features.gib_pages = edx.pdpe1gb;
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cpu_features.nx = edx.nx;
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cpu_features.syscall = edx.syscall_sysret;
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}
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if (max_ext >= 0x80000004) {
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@@ -638,6 +627,8 @@ pub fn detect_cpu_features() void {
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};
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var off: usize = 0;
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const brand_string = &cpu_features.brand_string;
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for (parts) |p| {
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for ([_]u32{ p.eax, p.ebx, p.ecx, p.edx }) |reg| {
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const dst: *[4]u8 = @ptrCast(brand_string[off..].ptr);
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@@ -650,32 +641,12 @@ pub fn detect_cpu_features() void {
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if (max_ext >= 0x80000007) {
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const r = CpuidRequest.execute(.PowerManagementInfo);
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const edx: PowerManagementInfoEdx = @bitCast(r.edx);
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invtsc = edx.invtsc;
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cpu_features.invariant_tsc = edx.invtsc;
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}
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if (hypervisor_flag) {
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hypervisor.detect();
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}
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cpu_features = .{
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.x2apic = x2apic,
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.five_level_paging = five_level_paging,
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.gib_pages = gib_pages,
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.tsc_deadline = tsc_deadline,
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.fxsave = fxsave,
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.xsave = xsave,
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.invariant_tsc = invtsc,
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.nx = nx,
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.pcid = pcid,
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.smap = smap,
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.smep = smep,
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.vendor = vendor,
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.brand_string = brand_string,
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.pge = pge,
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.family = family,
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.umip = umip,
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.syscall = syscall,
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};
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}
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pub const TssDescriptor = extern struct {
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