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ke: rework DPC memory ordering
swapping with acq_rel here ensures that all previous stores are visible to the DPC when it's running
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+2
-2
@@ -60,7 +60,7 @@ pub fn enqueue(dpc: *Dpc, arg: ?*anyopaque) void {
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const mycpu = ke.cpu.current();
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const dpc_cpu = pcpu.local();
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if (dpc.inserted.cmpxchgStrong(false, true, .acquire, .monotonic) == null) {
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if (!dpc.inserted.swap(true, .acq_rel)) {
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dpc.arg = arg;
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// Insert the DPC on this CPU's DPC queue
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@@ -104,12 +104,12 @@ fn dispatch_queue(cpu: u32) void {
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first_elem.remove();
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dpc = @fieldParentPtr("link", first_elem);
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dpc.inserted.store(false, .release);
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// An interrupt which would enqueue this DPC could occur between
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// loading the argument and calling the routine, which is why we capture
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// it here to ensure that we get the intended context.
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const arg = dpc.arg;
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_ = dpc.inserted.swap(false, .acq_rel);
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dpc_cpu.lock.release(ipl);
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assert(ke.ipl.current() == .Dispatch);
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