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feat(pc): add AP startup
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@@ -0,0 +1,115 @@
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const apic = @import("apic.zig");
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const b = @import("base");
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const std = @import("std");
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const rtl = @import("rtl");
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const config = @import("config");
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const mm = b.mm;
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const ke = b.ke;
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const ki = ke.private;
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const amd64 = @import("arch");
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const log = std.log.scoped(.smp);
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extern var AP_TRAMPOLINE_START: u8;
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extern var AP_TRAMPOLINE_END: u8;
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extern var AP_TRAMPOLINE_DATA: u8;
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extern var __percpu_start: u8;
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extern var __percpu_end: u8;
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export var cpu_id_to_apic_id: [config.CONFIG_NCPUS]u32 = undefined;
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const start_stack = ke.ExportedCpuLocal(usize, 0, "ap_start_stack");
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var aps_booted: std.atomic.Value(usize) = .init(0);
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const ApData = extern struct {
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entry: usize align(1),
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cr3: usize align(1),
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idtr: usize align(1),
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xapic_base: usize align(1),
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xapic_virt_base: usize align(1),
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};
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fn ap_entry(cpu_id: u32) callconv(.c) noreturn {
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_ = aps_booted.fetchAdd(1, .monotonic);
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ki.impl.init.ap_entry(cpu_id);
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}
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pub fn init() linksection(b.init) void {
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const trampoline_start = @intFromPtr(&AP_TRAMPOLINE_START);
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const trampoline_size = @intFromPtr(&AP_TRAMPOLINE_END) - trampoline_start;
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// Map the trampoline page.
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mm.private.kernel_pmap.map_contiguous_range(0x8000, 0x8000, 0x1000, .{
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.read = true,
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.write = true,
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.execute = true,
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});
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// From Linux, on modern CPUs we can skip the long delay after INIT.
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const skip_delay = switch (amd64.cpu_features.vendor) {
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.Intel => amd64.cpu_features.family >= 0x06,
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.Amd => amd64.cpu_features.family >= 0x0f,
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.Hygon => amd64.cpu_features.family >= 0x18,
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.Unknown => false,
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};
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const init_delay: usize = if (skip_delay) 0 else std.time.ns_per_ms * 10;
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const sipi_delay: usize = if (skip_delay) std.time.ns_per_us * 10 else std.time.ns_per_us * 300;
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const page: [*]u8 = @ptrFromInt(mm.p2v(0x8000));
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@memcpy(page[0..trampoline_size], @as([*]u8, @ptrFromInt(trampoline_start)));
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const data_offset = @intFromPtr(&AP_TRAMPOLINE_DATA) - trampoline_start;
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const data_phys: *ApData = @ptrFromInt(mm.p2v(0x8000 + data_offset));
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const idtr = amd64.sidtr();
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// Allocate per-cpu offsets for CPU-local data.
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ki.impl.cpu_offsets = @ptrCast(mm.zone.gpa.alloc(usize, apic.apics.items.len + 1) catch @panic("Failed to allocate AP local data offsets"));
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const percpu_size = @intFromPtr(&__percpu_end) - @intFromPtr(&__percpu_start);
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ki.impl.cpu_offsets[0] = @intFromPtr(&__percpu_start);
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cpu_id_to_apic_id[0] = apic.get_id();
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// Set up the AP data block.
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data_phys.entry = @intFromPtr(&ap_entry);
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data_phys.cr3 = amd64.read_cr(3);
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data_phys.idtr = @intFromPtr(&idtr);
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data_phys.xapic_base = apic.xapic_base_physical;
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data_phys.xapic_virt_base = mm.p2v(apic.xapic_base_physical);
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for (0..apic.apics.items.len, apic.apics.items) |i, apic_id| {
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const cpu_id = i + 1;
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cpu_id_to_apic_id[cpu_id] = apic_id;
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// Allocate per-cpu data.
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const cpu_data = mm.zone.gpa.alloc(u8, percpu_size) catch @panic("Failed to allocate per-cpu data");
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@memcpy(cpu_data, @as([*]u8, @ptrCast(&__percpu_start))[0..percpu_size]);
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ki.impl.cpu_offsets[cpu_id] = @intFromPtr(cpu_data.ptr) -% @intFromPtr(&__percpu_start);
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const stack_top = @intFromPtr(mm.heap.alloc(b.kib(16)) catch @panic("Failed to allocate AP stack")) + b.kib(16);
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start_stack.remote(@intCast(cpu_id)).* = stack_top & ~@as(usize, 15);
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rtl.barrier.wmb();
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// Send the INIT-SIPI-SIPI sequence to start the AP.
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apic.send_init(apic_id);
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ke.time.sleep(init_delay);
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apic.send_sipi(apic_id, 0x08);
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ke.time.sleep(sipi_delay);
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apic.send_sipi(apic_id, 0x08);
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}
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while (aps_booted.load(.acquire) < apic.apics.items.len) {
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std.atomic.spinLoopHint();
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}
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log.info("Booted all APs, total {} CPUs", .{apic.apics.items.len + 1});
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ke.ncpus = apic.apics.items.len + 1;
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}
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