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interrupts: IPL_IGNORE which doesn't raise nor lower the IPL on an interrupt

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Matheus
2023-06-27 20:03:57 -03:00
parent 98fc4eb23d
commit 0185572afc
5 changed files with 9 additions and 6 deletions
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kernel-src/arch/x86-64/apic.c
+1 -1
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@@ -201,7 +201,7 @@ void arch_apic_initap() {
writelapic(APIC_LVT_LINT1, LVT_MASK);
writelapic(APIC_LVT_ERROR, LVT_MASK);
writelapic(APIC_LVT_TIMER, LVT_MASK);
interrupt_register(0xff, spurious, NULL, IPL_MAX); // XXX for now max ipl suffices, however it's likely not the best one
interrupt_register(0xff, spurious, NULL, IPL_IGNORE);
writelapic(APIC_REG_SPURIOUS, 0x1FF);
_cpu()->id = readlapic(APIC_REG_ID) >> 24;
kernel-src/arch/x86-64/idt.c
+1 -1
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@@ -79,7 +79,7 @@ void arch_idt_reload() {
// make sure to reserve the first 32 isrs for exceptions with a dummy panic isr
for (int i = 0; i < 32; ++i)
interrupt_register(i, exceptisr, NULL, IPL_MAX);
interrupt_register(i, exceptisr, NULL, IPL_IGNORE);
_cpu()->ipl = IPL_NORMAL;
interrupt_set(true);
kernel-src/arch/x86-64/mmu.c
+1 -1
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@@ -265,5 +265,5 @@ void arch_mmu_init() {
}
arch_mmu_switch(FROM_HHDM(template));
interrupt_register(14, pfisr, NULL, IPL_MAX);
interrupt_register(14, pfisr, NULL, IPL_IGNORE);
}
kernel-src/include/kernel/interrupt.h
+1 -1
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@@ -11,7 +11,7 @@
#error Unsupported architecture!
#endif
#define IPL_EXCEPT -1
#define IPL_IGNORE -1
#define IPL_MAX 0
#define IPL_TIMER 1
#define IPL_KEYBOARD 2
kernel-src/sys/interrupt.c
+5 -2
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@@ -30,12 +30,15 @@ static void insertinqueue(isr_t *isr) {
}
static void runisr(isr_t *isr, context_t *ctx) {
long oldipl = interrupt_raiseipl(isr->priority);
long oldipl = -1;
if (isr->priority != IPL_IGNORE)
oldipl = interrupt_raiseipl(isr->priority);
isr->func(isr, ctx);
interrupt_set(false);
interrupt_loweripl(oldipl);
if (isr->priority != IPL_IGNORE)
interrupt_loweripl(oldipl);
}
static void dopending(context_t *ctx) {