mirror of
https://github.com/Mathewnd/Astral.git
synced 2026-11-01 23:18:21 +00:00
More debugging to _panic()
Added a stack trace and a register dump
This commit is contained in:
@@ -36,6 +36,4 @@ void idt_bspinit(){
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idt_reload();
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idt_reload();
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asm("int $0x0");
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}
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}
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@@ -3,6 +3,8 @@
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#include <arch/gdt.h>
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#include <arch/gdt.h>
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#include <arch/ist.h>
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#include <arch/ist.h>
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#include <arch/ist.h>
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#include <arch/regs.h>
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// cpu level storage
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// cpu level storage
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// this will be pointed to by GS and will contain per cpu info
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// this will be pointed to by GS and will contain per cpu info
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@@ -10,6 +12,7 @@
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typedef struct{
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typedef struct{
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gdt_t gdt;
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gdt_t gdt;
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ist_t ist;
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ist_t ist;
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arch_regserror *laststate;
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} cls_t;
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} cls_t;
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void bsp_setcls();
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void bsp_setcls();
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@@ -1,8 +1,10 @@
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#ifndef _ISR_H_INCLUDE
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#ifndef _ISR_H_INCLUDE
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#define _ISR_H_INCLUDE
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#define _ISR_H_INCLUDE
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extern void asmisr_general(void*);
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#include <arch/regs.h>
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extern void asmisr_except(void*);
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extern void asmisr_general(arch_regsnoerror*);
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extern void asmisr_except(arch_regserror*);
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@@ -1,6 +1,8 @@
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#ifndef _PANIC_H_INCLUDE
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#ifndef _PANIC_H_INCLUDE
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#define _PANIC_H_INCLUDE
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#define _PANIC_H_INCLUDE
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__attribute__((noreturn)) void _panic(char *reason);
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#include <arch/regs.h>
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__attribute__((noreturn)) void _panic(char *reason, arch_regserror *reg);
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#endif
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#endif
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@@ -0,0 +1,15 @@
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#ifndef _REGS_H_INCLUDE
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#define _REGS_H_INCLUDE
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#include <stdint.h>
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typedef struct{
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uint64_t cr2,gs,fs,es,ds,rax,rbx,rcx,rdx,r8,r9,r10,r11,r12,r13,r14,r15,rdi,rsi,rbp,error,rip,cs,rflags,rsp,ss;
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} arch_regserror;
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typedef struct{
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uint64_t cr2,gs,fs,es,ds,rax,rbx,rcx,rdx,r8,r9,r10,r11,r12,r13,r14,r15,rdi,rsi,rbp,rip,cs,rflags,rsp,ss;
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} arch_regsnoerror;
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#endif
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@@ -1,13 +1,13 @@
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#include <arch/isr.h>
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#include <arch/isr.h>
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#include <arch/panic.h>
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#include <arch/panic.h>
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void isr_general(void*){
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void isr_general(arch_regsnoerror *reg){
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_panic("Unhandled interrupt");
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_panic("Unhandled interrupt", 0);
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asm("hlt");
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asm("hlt");
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}
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}
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void isr_except(void*){
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void isr_except(arch_regserror *reg){
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_panic("CPU Exception");
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_panic("CPU Exception", reg);
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asm("hlt;");
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asm("hlt;");
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}
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}
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+33
-3
@@ -1,11 +1,41 @@
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#include <arch/panic.h>
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#include <arch/panic.h>
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#include <arch/regs.h>
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#include <stdio.h>
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#include <stdio.h>
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#include <stddef.h>
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__attribute((noreturn)) void _panic(char* reason){
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#define TRACE_MAXDEPTH 10
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// TODO stack trace and register print
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// TODO trace names
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static void tracestack(uint64_t** addr){
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for(size_t depth = 0; depth < TRACE_MAXDEPTH; ++depth){
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uint64_t *calleeaddr = *(addr + 1);
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addr = (uint64_t**)*addr;
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printf("%lu: %p\n", depth, calleeaddr);
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if(depth == TRACE_MAXDEPTH || calleeaddr == 0) break;
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}
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}
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__attribute((noreturn)) void _panic(char* reason, arch_regserror *reg){
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printf("PANIC: %s.\n", reason);
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if(reg){
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printf("Register dump:\nRAX: %p RBX: %p RCX: %p RDX: %p R8: %p R9: %p R10: %p R11: %p R12: %p R13: %p R14: %p R15: %p RDI: %p RSP: %p RBP: %p DS: %p ES: %p FS: %p GS: %p CR2: %p ERR: %p RIP: %p CS: %p RFLAGS: %p SS: %p\n",
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reg->rax, reg->rbx, reg->rcx, reg->rdx, reg->r8, reg->r9, reg->r10,
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reg->r11, reg->r12, reg->r13, reg->r14, reg->r15, reg->rdi, reg->rsp, reg->rbp, reg->ds, reg->es, reg->fs, reg->gs, reg->cr2, reg->error, reg->rip, reg->cs, reg->rflags, reg->ss
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);
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printf("Panic location: %p\n", reg->rip);
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printf("Stack trace:\n");
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tracestack((uint64_t**)reg->rbp);
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}
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printf("Kernel panic.\nWhy: %s\nWhere: TODO\nWho: TODO\n", reason);
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while(1){
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while(1){
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asm("cli;hlt;");
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asm("cli;hlt;");
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