mirror of
https://github.com/Mathewnd/Astral.git
synced 2026-10-29 05:38:21 +00:00
nvme: identify command and structs
This commit is contained in:
Matheus
Regular → Executable
+172
-26
@@ -28,6 +28,10 @@
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#define OPCODE_IDENTIFY 0x6
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#define IDENTIFY_TYPE_CONTROLLER 0
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#define IDENTIFY_TYPE_NAMESPACE 1
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#define IDENTIFY_TYPE_NAMESPACELIST 2
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typedef struct{
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uint64_t cap;
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uint32_t vs;
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@@ -91,7 +95,7 @@ typedef struct{
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volatile nvme_bar0* bar0;
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queuepair_t adminqueue;
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queuepair_t* ioqueue;
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} ctlrinfo;
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} ctlrinfo_t;
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typedef struct{
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subqentry sub;
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@@ -99,15 +103,135 @@ typedef struct{
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event_t completion;
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} entrypair_t;
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typedef struct{
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uint16_t metadatasize;
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uint8_t lbadatasize; // power of two
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uint8_t relativeperformance : 2;
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uint8_t reserved : 6;
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} __attribute__((packed)) lbaformat_t;
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typedef struct{
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uint64_t lbasize;
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uint64_t lbacapacity;
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uint64_t lbautilized;
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uint8_t features;
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uint8_t lbaformatcount;
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uint8_t lbaformattedsize;
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uint8_t metadatacap;
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uint8_t endtoendprot;
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uint8_t endtoendprotsettings;
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uint8_t sharingcap;
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uint8_t rescap;
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uint8_t fpi;
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uint8_t deallocate;
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uint8_t atomicwrite;
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uint16_t atomicwritepowerfail;
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uint16_t atomiccomparewrite;
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uint16_t atomicboundarysize;
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uint16_t atomicboundaryoffset;
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uint16_t atomicboundarypowerfail;
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uint16_t optimalioboundary;
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uint64_t nvmcapacity[2];
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uint16_t preferredwritegranularity;
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uint16_t preferredwritealignment;
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uint16_t preferreddeallocategranularity;
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uint16_t preferreddeallocatealignment;
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uint16_t optimalwritesize;
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uint8_t _reserved[18];
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uint32_t anagrpid;
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uint16_t __reserved;
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uint8_t namespaceattr;
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uint16_t nvmsetid;
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uint16_t endgid;
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uint64_t namespaceguid[2];
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uint64_t eui64;
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uint32_t lbaformat[16];
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} __attribute__((packed)) namespacedata_t;
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typedef struct{
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uint16_t pcivendor;
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uint16_t pcisubsystemvendor;
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uint8_t serialnum[20];
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uint8_t modelnum[20];
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uint64_t fwrevision;
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uint8_t recommendedburst;
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uint8_t ouiid[3];
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uint8_t namespacesharing;
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uint8_t maxdatatransfer; // power of two
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uint16_t controllerid;
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uint32_t version;
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uint32_t rtd3resumelatency;
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uint32_t rtd3entrylatency;
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uint32_t optionalasyncevents;
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uint32_t attributes;
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uint16_t rrlsupported;
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uint64_t reserved;
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uint8_t type;
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uint64_t fguid[2];
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uint16_t crdt[3];
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uint8_t _reserved[106];
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uint8_t mi_res[16];
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uint16_t admincmdsupport;
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uint8_t abortlimit;
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uint8_t asynceventrqlimit;
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uint8_t firmwareupdates;
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uint8_t logpages;
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uint8_t errorlogpages;
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uint8_t powerstatenum;
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uint8_t adminvendorspecific;
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uint8_t apsta;
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uint16_t wctemp;
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uint16_t cctemp;
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uint16_t mtfa;
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uint32_t hmpre;
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uint32_t hmmin;
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uint64_t tnvmcap[2];
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uint64_t unvmcap[2];
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uint32_t rpmbs;
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uint16_t edstt;
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uint8_t dsto;
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uint8_t fwug;
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uint16_t kas;
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uint16_t hctma;
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uint16_t mntmt;
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uint16_t mxtmt;
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uint32_t sanicap;
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uint32_t hmminds;
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uint16_t hmmaxd;
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uint16_t nsetidmax;
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uint16_t endgidmax;
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uint8_t anatt;
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uint8_t anacap;
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uint32_t anagrpmax;
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uint32_t nanagrpid;
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uint32_t pels;
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uint8_t __reserved[156];
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uint8_t sqentrysize; // powers of 2
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uint8_t cqentrysize;
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uint16_t maxcmd;
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uint32_t namespacecount;
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uint16_t oncs;
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uint16_t fuses;
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uint8_t fna;
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uint8_t vwc;
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uint16_t awun;
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uint16_t awupf;
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uint8_t nvscc;
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uint8_t nwpc;
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uint16_t acwu;
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} __attribute__((packed)) controllerid_t;
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#define ASQSIZE PAGE_SIZE / sizeof(subqentry)
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#define ACQSIZE PAGE_SIZE / sizeof(compqentry)
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static ctlrinfo* ctlrpass;
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static ctlrinfo_t* ctlrpass;
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static queuepair_t* queuepass;
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static int controllercount;
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static ctlrinfo** controllers;
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static ctlrinfo_t** controllers;
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#include <arch/io.h>
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@@ -124,7 +248,7 @@ void nvme_irq(){
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__attribute__((noreturn)) static void nvme_workerthread(){
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ctlrinfo* controller = ctlrpass;
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ctlrinfo_t* controller = ctlrpass;
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queuepair_t* queuepair = queuepass;
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entrypair_t* userentries[256];
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int lowestfreepair = 0;
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@@ -141,8 +265,6 @@ __attribute__((noreturn)) static void nvme_workerthread(){
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if(ringbuffer_datacount(&queuepair->userrequests)){
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// process a user request
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// get the pair address and store it
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int pair = lowestfreepair;
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while(userentries[pair]) ++pair;
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@@ -206,6 +328,39 @@ static inline void dispatchandwait(entrypair_t* e, queuepair_t* q){
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arch_interrupt_enable();
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}
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#define IDENTIFY_SIZE 4096
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int nvme_identify(ctlrinfo_t* ctlr, void* buff, int type, int what){
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__assert(type < 3); // anything else is not supported atm
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entrypair_t pair;
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memset(&pair, 0, sizeof(entrypair_t));
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pair.sub.dataptr[0] = pmm_alloc(1);
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if(!pair.sub.dataptr[0])
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return ENOMEM;
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pair.sub.command[0] = type;
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pair.sub.d0.opcode = OPCODE_IDENTIFY;
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if(type == IDENTIFY_TYPE_NAMESPACE)
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pair.sub.namespace = what;
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dispatchandwait(&pair, &ctlr->adminqueue);
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memcpy(buff, MAKEHHDM(pair.sub.dataptr[0]), IDENTIFY_SIZE);
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return pair.comp.status ? EIO : 0;
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}
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int nvme_identifycontroller(ctlrinfo_t* ctlr, void* buff){
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return nvme_identify(ctlr, buff, IDENTIFY_TYPE_CONTROLLER, 0);
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}
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static void nvme_initctlr(pci_enumeration* pci){
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void* bar0p = getbarmemaddr(pci->header, 0);
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@@ -300,9 +455,9 @@ static void nvme_initctlr(pci_enumeration* pci){
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return;
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}
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ctlrinfo* info = alloc(sizeof(ctlrinfo));
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ctlrinfo_t* info = alloc(sizeof(ctlrinfo_t));
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controllers = realloc(controllers, sizeof(ctlrinfo*)*(controllercount+1));
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controllers = realloc(controllers, sizeof(ctlrinfo_t*)*(controllercount+1));
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if(info == NULL || controllers == NULL)
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_panic("Out of memory", NULL);
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@@ -324,30 +479,21 @@ static void nvme_initctlr(pci_enumeration* pci){
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ctlrpass = info;
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queuepass = &info->adminqueue;
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info->adminqueue.worker = sched_newkthread(nvme_workerthread, PAGE_SIZE*1000, true, THREAD_PRIORITY_KERNEL);
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if(!info->adminqueue.worker)
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_panic("Out of memory!", NULL);
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entrypair_t pair;
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memset(&pair, 0, sizeof(entrypair_t));
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pair.sub.dataptr[0] = pmm_alloc(1);
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if(!pair.sub.dataptr[0])
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_panic("Out of memory!\n", NULL);
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pair.sub.command[0] = 1;
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pair.sub.d0.opcode = OPCODE_IDENTIFY;
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if(msix)
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pci_msixadd(pci, 0, arch_getcls()->lapicid, VECTOR_NVME, true, false);
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else
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pci_msiadd(pci, arch_getcls()->lapicid, VECTOR_NVME, true, false);
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dispatchandwait(&pair, &info->adminqueue);
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info->adminqueue.worker = sched_newkthread(nvme_workerthread, PAGE_SIZE*1000, true, THREAD_PRIORITY_KERNEL);
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if(!info->adminqueue.worker)
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_panic("Out of memory!", NULL);
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controllerid_t* ctlrid = alloc(4096);
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nvme_identifycontroller(info, ctlrid);
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}
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@@ -358,7 +504,7 @@ void nvme_init(){
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controllers = alloc(1);
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__assert(controllers);
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if(!e)
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return;
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