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x86-64: handle some more exceptions properly

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Matheus
2026-04-16 18:00:33 -03:00
parent a9d874c32d
commit c54d618c82
2 changed files with 16 additions and 2 deletions
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kernel-src/arch/x86-64/cpu.c
+14 -2
View File
@@ -22,7 +22,7 @@ static void illisr(isr_t *self, context_t *ctx) {
}
}
static void div0isr(isr_t *self, context_t *ctx) {
static void sigfpeisr(isr_t *self, context_t *ctx) {
if (ARCH_CONTEXT_ISUSER(ctx)) {
signal_signalthread(current_thread(), SIGFPE, true);
} else {
@@ -46,6 +46,14 @@ static void x87isr(isr_t *self, context_t *ctx) {
}
}
static void dbisr(isr_t *self, context_t *ctx) {
if (ARCH_CONTEXT_ISUSER(ctx)) {
signal_signalthread(current_thread(), SIGTRAP, true);
} else {
_panic("Debug Exception", ctx);
}
}
static void reload_ldt(isr_t *self, context_t *ctx) {
if (current_thread() == NULL || current_thread()->proc == NULL || current_thread()->proc->ldt == NULL)
return;
@@ -221,7 +229,11 @@ void arch_cpu_init() {
x86_64_mmu_enable_global_pages();
// register some exception handlers that give out signals
interrupt_register(0, div0isr, NULL, IPL_IGNORE);
interrupt_register(0, sigfpeisr, NULL, IPL_IGNORE);
interrupt_register(1, dbisr, NULL, IPL_IGNORE);
interrupt_register(3, dbisr, NULL, IPL_IGNORE);
interrupt_register(4, sigfpeisr, NULL, IPL_IGNORE);
interrupt_register(5, sigfpeisr, NULL, IPL_IGNORE);
interrupt_register(6, illisr, NULL, IPL_IGNORE);
interrupt_register(16, x87isr, NULL, IPL_IGNORE);
interrupt_register(19, simdisr, NULL, IPL_IGNORE);
kernel-src/arch/x86-64/mmu.c
+2
View File
@@ -422,6 +422,8 @@ INIT_ROUTINE_DEFINE(mmu, INIT_ROUTINE_FLAGS_NONE, arch_mmu_init, pmm);
void arch_mmu_apswitch() {
arch_mmu_switch(FROM_HHDM(template));
interrupt_register(11, gpfisr, NULL, IPL_IGNORE);
interrupt_register(12, gpfisr, NULL, IPL_IGNORE);
interrupt_register(13, gpfisr, NULL, IPL_IGNORE);
interrupt_register(14, pfisr, NULL, IPL_IGNORE);
interrupt_register(0xfe, arch_mmu_tlbipi, ARCH_EOI, IPL_IGNORE);